4 Replies Latest reply on Nov 18, 2015 1:41 PM by DAB

    PSoC 4 Pioneer Kit Community Project#093 – 4 Channel Multiplexed Comparator (No Code)




      In today’s example we expand on the comparator example released last week (#090). In today’s example we are creating a multiplexed comparator that reads multiple signals using a single comparator. The example uses an analog multiplexer to change input and threshold signals all in the PSoC hardware. This means that the example requires no code and consumes no CPU time to execute. After we make three calls to start the components, the remaining firmware we write for this example is the following:




      //Good job, go get some coffee



      If you can remember from some of our earlier examples we talked about the advantage that PSoC has allowing customers to design and configure the chip hardware into the device they need not the device that is available. There is an enormous potential using the digital and analog resources to design hardware only functions into the chip, requiring little to no code to execute. We’ve seen this in examples #001 , #066 and our UDB training series (Training 110 to 211). In today’s example we increase the complexity of those base examples to show the user how to configure a 4 channel Multiplexed Comparator.


      001 - Schematic Design 1.png


      Forum Post Attachments:


      At the bottom of this post we are including the following items:

      • Example Project Zip File
      • Project Images


      Components Used: 


      The user can download the example project at the bottom of this post. The project uses the following list of Creator Components:

      • Amux
      • Comparator
      • CySync
      • D-Flip Flop w/ Enable
      • IDAC
      • Counter
      • LUT
      • CyPins


      Firmware Description:


      The main.c firmware is included in the example project. Please review the commented sections for more details.


      001 - Schematic Design 1.png

      002 - Schematic Design 2.png


      In the main function all components are started. Once started, at each clock pulse the multiplexer sequentially switches input signals and threshold voltages. Threshold voltages are generated by the resistances connected to the IDAC through the multiplexer. The input signal is compared to the corresponding threshold voltage and the output is fed to the latch logic block. The latch clock and channel select signal latches the comparator output to the active channel.


      The Control logic if implemented using LUT based decoder and counter component. The Amux_Input and Amux_Th components are used to select input signals and corresponding comparator thresholds. The comparator is used to compare the input signal with the threshold signal and generate output signal accordingly. The IDAC is used to generate threshold voltages for comparison. The Sync component synchronizes the comparator output with the high frequency clock.


      The threshold voltages fed to the comparator is like a staircase depending upon the resistances used. Resistances 2.2k, 4.4k, 6.8k, and 8k are connected to reference pins as described in development kit configuration section with an IDAC sourcing a current of 100 micro-amps. The following table describes the threshold voltages levels generated using the resistors.


      005 - Threshold Voltage Values.png


      The input, threshold signals and output waveform is shown in the following image. The project is designed for input signal frequency below 1KHz.


      003 - Output Signal.png


      Hardware Connections:


      There are no hardware configurations for this example. Simply attach your o-scope to output pins to see the signal output from the comparator.


      004 - Connection Schematic.png


      Test Your Project:


      Program the Pioneer kit with the example project, connect your input sources and connect the o-scope to the signal output. View the signal output.


      I hope this example can help you in your design.