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AVNET 96Boards Dual Camera Mezzanine + Ultra96-V2 - Review

Scoring

Product Performed to Expectations: 8
Specifications were sufficient to design with: 7
Demo Software was of good quality: 8
Product was easy to use: 7
Support materials were available: 8
The price to performance ratio was good: 9
TotalScore: 47 / 60
  • RoadTest: AVNET 96Boards Dual Camera Mezzanine + Ultra96-V2
  • Buy Now
  • Evaluation Type: Development Boards & Tools
  • Was everything in the box required?: Yes
  • Comparable Products/Other parts you considered: 96boards DUAL MIPI Adapter Mezzanine - AiStarVision
  • What were the biggest problems encountered?: Not having the proper Monitor or miniDP to HDMI cable took a bit to resolve. As an on going issue with the Xilinx software tools, each version of their tools such as Vitis or Vivado require a different version of an OS to install the software on. I had initally choose to use the latest version of Vitis, 2020.2, but then found the examples were done in version 2020.1 so I had to build another development VM to host Ubuntu 18.04.4 which is required for Vitis 2020.1. Also, there is not a lot of documentation or examples to use the 96Boards Dual Camera Mezzanine board, so the testing was limited.

  • Detailed Review:

    AVNET 96Boards Dual Camera Mezzanine + Ultra96-V2

    Overview

    The AVNET 96Boards Dual Camera Mezzanine + Ultra96-V2 is a nice combination for testing the On Semiconductor AP1302 Image Signal Processor and PoLight IAS CAV10-000A sensor modules. The 96Boards Dual Camera Mezzanine includes two PoLight IAS sensor modules which include On Semiconductor CMOS AR0144 Imaging sensors. The imaging sensors are fed into the on board On Semiconductor AP1302 Image Signal Coprocessor for image processing. The PoLight IAS sensor modules offer up to 1280x800 resolution at 1 megapixel and up to 60 frames per second with full resolution. The images are processed as Monochrome for fast processing and finer sensitivity. The PoLight IAS sensor modules connect to the Dual Camera Mezzanine board via MIPI interfaces and include 84 degree FOV lens. The On Semiconductor AP1302 Image Signal Processor is capable of up to 4-lane MIPI (1.2 Gbps per lane) signaling and 30 frames per second(fps) at 14MP, or 120 fps at 1080p. The two MIPI interfaces from the PoLight IAS sensor modules are combined in to a single MIPI output port. The primary camera input supports RAW6 or RAW8 formats and supports a variety of output formats including YUV422, JPEG, RAW8, 888RGB and MJPEG. The 96Boards Dual Camera Mezzanine can be paired with the Ultra96-V2 for use in Robotics, Machine Vision, IoT or Computer Imagining applications. The two boards interface each other via a 60 pin High Speed connector for Display output and a Low Speed connector for power. There is an OutOfBox example which uses PetaLinux and Xilinx Vitis Hardware definitions to process the image from the Dual Camera Mezz out through the mini Display Port of the Ultra96-V2 via a 1080p supported monitor. This combination of the Dual Camera Mezzanine and the Ultra96-V2 has much potential for use in many applications such as Robotics, Machine Learning and Computer Vision for Drones, however these were not explored in this review due to the limited available examples.

    • Overview Video

    Specifications

    • Ultra96-V2

      • Xilinx Zynq UltraScale+ MPSoC ZU3EG SBVA484
      • Micron 2 GB (512M x32) LPDDR4 Memory
      • microSD Socket with microSD card
        • Ships with Delkin Utility MLC 16GB card
      • Microchip Wi-Fi / Bluetooth
      • Mini DisplayPort (MiniDP or mDP)
        • Requires Active MiniDP to HDMI Cable for HDMI Monitors (1080p support required)
      • 40-pin Low-speed expansion header

      • 60-pin High-speed expansion header

    • AVNET 96Boards Dual Camera Mezzanine

      • Two Polight IAS sensor modules (CAV10-000A - Compact Global Shutter Imaging Solution)
        • Low resolution sensor allows for fast data processing

          • 1280 x 800 resolution (1 megapixel)

          • Up to 60 frames/second full resolution

          • Monochrome for fast processing and better sensitivity

          • 84 deg FOV lens, MIPI interface

          • Samples available in July 2020

      • AP1302 imaging coprocessor
        • Primary camera input format - RAW6, RAW8
        • Primary camera interface - Up to 4-lane MIPI (1.2 Gbps / lane)
        • Secondary camera interface -Up to 3-lane MIPI (1.2 Gbps / lane)
        • Output format - YUV422, YUV420, 888RGB, 565RGB, 555RGB, JPEG,RAW8, RAW10, RAW12, MJPEG

        • Maximum resolution - 4224 x 3156 (13Mp)

        • Maximum frame rate - 30 fps at 13MP; 120 fps at 1080p

        • Maximum colour processing frequency - 540 Mpixels / second

      • 40-pin Low-speed expansion header
      • 60-pin High-speed expansion header
      • 12V/5V Selectable
      • DSI Display Connector (DSI- Display Serial Interface)

    References

    • Avnet / On Semiconductor Image Sensing Solutions:

    Parts Provided by element14 for the RoadTest

    • Ultra96-V2 Zynq UltraScale+ ZU3EG Single Board Computer
      • Vivado Design Edition SDSoC Voucher
      • Delkin Devices 16GB uSD card

     

     

    Extra Hardware used

     

    Software Used

    • Xilinx Vitis 2020.1
      • Vivado 2020.1
      • PetaLinux 2020.1
      • Xilinx Runtime Library (XRT)
        • Vitis 2020.1 version
      • GtkTerm

     

    Development Environment

    • Oracle VirtualBox VM
      • Ubuntu 18.04.4
        • 8GB Memory
        • 500GB Fixed Virtual Disk
        • 8GB Swap
        • 4 x Processors (Xeon Quad Core)
        • Processor Execution Cap (80%)
        • Enable PAE/NX

     

    Ultra96 Board Bring Up

        Ubuntu VirtualBox Creation

         To get started with using the Ultra96-V2 and AVNET 96Boards Dual Camera Mezzanine, a development environment was needed to accommodate both Hardware and PetaLinux development.  Oracle VirtualBox

         was selected to host the Ubuntu 18.04.4 OS required to run the Xilinx Vitis 2020.1 development tools.   The Ubuntu version 18.04.4 used is a requirement for Xilinx Vitis 2020.1

     

    • Using the VirtualBox and Linux VM Install Guide provided by element14

     

            The VirtualBox and Linux VM Installation Guide v2020 can be found at

           https://www.element14.com/community/docs/DOC-95649/l/ultra96-v2

     

           The VirtualBox_Installation_Guide_2020_1_v1p1.pdf  is listed under :

            https://avtinc.sharepoint.com/teams/ET-Downloads/Shared%20Documents/Forms/AllItems.aspx?originalPath=aHR0cHM6Ly9hdnRpbmMuc2hhcmVwb2ludC5jb20vOmY6L3QvRVQtRG93bmxvYWRzL0VpYUJ6ZkRrRHI5Sm8yT1FONTJ6b1FzQkQxUkdEcUJIdDVtYTEwSjFzVWloVXc%5FcnRpbWU9X2tJa3J6VHkyRWc&viewid=dba68156%2Dce4b%2D4ebb%2Db7a7%2Dec03b27b013d&id=%2Fteams%2FET%2DDownloads%2FShared%20Documents%2Fprojects%2Fpublic%5Frelease%2F2020%2E1%2FVM%5FInstall%5FGuide

     

    • This is a pretty involved process which covers the complete install and set-up of a Virtual Machine to host the Xilinx Vitis 2020.1 tools, thus the process will not be covered here and it is best to reference the document.
    • Notes:
      • Xilinx Vitis 2020.1 pre requirements:
        • Disable Automatic Ubuntu updates dues to compatibility issues with new OS updates and Vitis 2020.1
        • sudo apt-get install gcc git make perl -y
        • sudo apt-get install --install-recommends linux-generic-hwe-18.04
        • sudo apt install libcanberra-gtk-module libcanberra-gtk3-module
        • sudo apt-get --yes install make g++ gcc ocl-icd-libopencl1 opencl-headers ocl-icd-opencl-dev python3 libgmp-dev
        • sudo apt-get install xinetd tftpd tftp
        • sudo apt-get --yes install libssl-dev
        • sudo apt-get --yes install tofrodos iproute2 gawk gcc git-core
        • sudo apt-get install -y zlib1g-dev zlib1g:i386 net-tools xterm autoconf libtool texinfo gcc-multilib
        • sudo apt-get install --yes gir1.2-gtop-2.0 gir1.2-networkmanager-1.0 gir1.2-clutter-1.0
        • sudo apt remove python-pyopencl
        • sudo apt install python3-pip

     

      • install and link make

        • sudo apt-get install make

        • sudo ln -s /usr/bin/make /usr/bin/gmake

     

      • Increase swap ( Increased to 8Gb in this case)
     sudo swapoff /swapfile 
    $ sudo rm /swapfile 
    $ sudo fallocate -l 8G /swapfile
    $ sudo dd if=/dev/zero of=/swapfile bs=1M count=8192
    $ sudo chmod 600 /swapfile
    $ sudo mkswap /swapfile
    $ sudo swapon /swapfile
    $ sudo swapon --show
    NAME      TYPE SIZE USED PRIO
    /swapfile file   8G   0B   -2
    

      • Set VirtualBox Processor Execution Cap to 80%
        • This was required to successfully complete the PetaLinux build

     

    • When the Ultra96-V2 USB-to-JTAG/UART Pod is connected to the PC, it can be added to the VM from the Devices->USB menu option:

     

     

    • There is a 3D printable case that can be used with the Ultra96-V2 to hold the device in.

                           NOTE: The top portion did not print well from my 3D printer, however with the Dual Camera Mezz attached it is not needed:

                           A Cable tie was added to hold the JTAG/UART Board down as well as a wire tie to hold the USB cable in place.

     

    Exercises

        Out of Box Example

     

    • Once the Image has been burnt to the provided 16GB uSD card, the board can be booted by pressing the Power button on the Ultra96-V2 Board

     

    • When the system is up and running, there is a webserver that runs on the Ultra96-V2 which can be connected to from a WiFi connection on a PC.

     

    • Once connected to the Ultra96-V2, the main page can be reached vi ip 192.168.2.1 via a browser:

     

    • The Ultra96-V2 provides options to run Examples Projects, Custom Content where the Webserver can be modified, Tutorials and other interesting pages to get started with the Ultra96-V2
    • The Example Projects include a page to contract the LEDs on the Ultra96-V2, run various WiFi iperf3 tests, and OpenAMP examples.

     

    • There is an Information and Document page which has a breakout of the features of the Ultra96-V2 as well as a list of Specifications.

     

    • Configurations

     

    • Change root password option

     

    • A page to control the GPIO LED settings.

     

    • GPIO LED Example Tutorial

     

    • Python Editor Example

     

    • One thing that I noticed is that the pages from the Ultra96-V2 webserver as well as some of the other documents for the board have an image of the board with a burned out power connection. Personally, I would not have included this on documentation for a product such as this and it sort of makes me nervous that the board is going to suffer a terrible demise.
      • Ex:

     

    • A closer look:

     

    • Ultra96-V2 Webserver Demo Video

     

        Dual Camera Mezz – Out of Box example

     

    • From the 96Boards ON Semiconductor Dual Camera Mezzanine page, there are some files listed such as the Getting Started Guide, Schematics, and an Out of Box image

            https://www.element14.com/community/docs/DOC-95548/l/96boards-on-semiconductor-dual-camera-mezzanine

     

    • The Getting Started Guide is a good place to start when getting familiar with the Dual Camera Mezz board.
      • This outlines installing the OOB image to a uSD card for the Dual Camera Mezz.

                   https://www.element14.com/community/docs/DOC-95591/l/96boardsdualcameramezzgsgpdf

     

         Booting the OOB Image

      • From the Ubuntu 18.04.4 VirtualBox instance and with the USB-to-JTAG/UART Pod connected and assigned to the VM, with the  Dual Camera Mezzanine attached, boot the Ultra96-V2 by pressing the  Power button (SW1).

     

     

      • Boot Sequence from the GtkTerm in the VM.
    Xilinx Zynq MP First Stage Boot Loader 
    
    
    Release 2020.1   Aug 14 2020  -  22:53:13
    NOTICE:  ATF running on XCZU3EG/silicon v4/RTL5.1 at 0xfffea000
    NOTICE:  BL31: v2.2(release):v1.1-5588-g5918e656e
    NOTICE:  BL31: Built : 22:34:55, Aug 14 2020
    
    
    
    
    U-Boot 2020.01 (Aug 18 2020 - 17:33:39 +0000)
    
    
    Model: Avnet Ultra96 Rev1
    Board: Xilinx ZynqMP
    DRAM:  2 GiB
    PMUFW: v1.1
    EL Level: EL2
    Chip ID: zu3eg
    NAND:  0 MiB
    MMC:   mmc@ff160000: 0, mmc@ff170000: 1
    In:    serial@ff010000
    Out:   serial@ff010000
    Err:   serial@ff010000
    Bootmode: SD_MODE
    Reset reason: EXTERNAL 
    Net:   No ethernet found.
    Hit any key to stop autoboot:  2     1     0 
    switch to partitions #0, OK
    mmc0 is current device
    Scanning mmc 0:1...
    Found U-Boot script /boot.scr
    2007 bytes read in 19 ms (102.5 KiB/s)
    ## Executing script at 20000000
    8313964 bytes read in 622 ms (12.7 MiB/s)
    ## Loading kernel from FIT Image at 10000000 ...
       Using 'conf@system-top.dtb' configuration
       Trying 'kernel@1' kernel subimage
         Description:  Linux kernel
         Type:         Kernel Image
         Compression:  gzip compressed
         Data Start:   0x100000f4
         Data Size:    8251525 Bytes = 7.9 MiB
         Architecture: AArch64
         OS:           Linux
         Load Address: 0x00080000
         Entry Point:  0x00080000
         Hash algo:    sha256
         Hash value:   22ed1c58ad614712b771a0e27ff96d52d6b3269321ee423885176b4c41550f32
       Verifying Hash Integrity ... sha256+ OK
    ## Loading fdt from FIT Image at 10000000 ...
       Using 'conf@system-top.dtb' configuration
       Trying 'fdt@system-top.dtb' fdt subimage
         Description:  Flattened Device Tree blob
         Type:         Flat Device Tree
         Compression:  uncompressed
         Data Start:   0x107dea8c
         Data Size:    60535 Bytes = 59.1 KiB
         Architecture: AArch64
         Hash algo:    sha256
         Hash value:   239f2beeb0c26cfc03521c3c00c8931a234b07770ea13e7fa072f91e0669b391
       Verifying Hash Integrity ... sha256+ OK
       Booting using the fdt blob at 0x107dea8c
       Uncompressing Kernel Image
       Loading Device Tree to 000000000ffee000, end 000000000ffffc76 ... OK
    
    
    Starting kernel ...
    
    
    [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
    [    0.000000] Linux version 5.4.0-xilinx-v2020.1 (oe-user@oe-host) (gcc version 9.2.0 (GCC)) #1 SMP Tue Aug 18 16:15:52 UTC 2020
    [    0.000000] Machine model: Avnet Ultra96 Rev1
    [    0.000000] earlycon: cdns0 at MMIO 0x00000000ff010000 (options '115200n8')
    [    0.000000] printk: bootconsole [cdns0] enabled
    [    0.000000] efi: Getting EFI parameters from FDT:
    [    0.000000] efi: UEFI not found.
    [    0.000000] Reserved memory: created DMA memory pool at 0x000000003ed40000, size 1 MiB
    [    0.000000] OF: reserved mem: initialized node rproc@3ed400000, compatible id shared-dma-pool
    [    0.000000] cma: Reserved 512 MiB at 0x000000005fc00000
    [    0.000000] psci: probing for conduit method from DT.
    [    0.000000] psci: PSCIv1.1 detected in firmware.
    [    0.000000] psci: Using standard PSCI v0.2 function IDs
    [    0.000000] psci: MIGRATE_INFO_TYPE not supported.
    [    0.000000] psci: SMC Calling Convention v1.1
    [    0.000000] percpu: Embedded 22 pages/cpu s49944 r8192 d31976 u90112
    [    0.000000] Detected VIPT I-cache on CPU0
    [    0.000000] CPU features: detected: ARM erratum 845719
    [    0.000000] Speculative Store Bypass Disable mitigation not required
    [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 515524
    [    0.000000] Kernel command line: earlycon console=ttyPS0,115200 clk_ignore_unused root=/dev/mmcblk0p2 rw rootwait cma=512M
    [    0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
    [    0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
    [    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
    [    0.000000] Memory: 1512432K/2094848K available (11836K kernel code, 690K rwdata, 3684K rodata, 704K init, 516K bss, 58128K reserved, 524288K cma-reserved)
    [    0.000000] rcu: Hierarchical RCU implementation.
    [    0.000000] rcu: RCU event tracing is enabled.
    [    0.000000] rcu: RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4.
    [    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
    [    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
    [    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
    [    0.000000] GIC: Adjusting CPU interface base to 0x00000000f902f000
    [    0.000000] GIC: Using split EOI/Deactivate mode
    [    0.000000] random: get_random_bytes called from start_kernel+0x2a8/0x42c with crng_init=0
    [    0.000000] arch_timer: cp15 timer(s) running at 100.00MHz (phys).
    [    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x171024e7e0, max_idle_ns: 440795205315 ns
    [    0.000004] sched_clock: 56 bits at 100MHz, resolution 10ns, wraps every 4398046511100ns
    [    0.008479] Console: colour dummy device 80x25
    [    0.012486] Calibrating delay loop (skipped), value calculated using timer frequency.. 200.00 BogoMIPS (lpj=400000)
    [    0.022840] pid_max: default: 32768 minimum: 301
    [    0.027604] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
    [    0.034786] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
    [    0.043875] ASID allocator initialised with 32768 entries
    [    0.047997] rcu: Hierarchical SRCU implementation.
    [    0.052943] EFI services will not be available.
    [    0.057349] smp: Bringing up secondary CPUs ...
    [    0.062085] Detected VIPT I-cache on CPU1
    [    0.062134] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
    [    0.062535] Detected VIPT I-cache on CPU2
    [    0.062555] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
    [    0.062913] Detected VIPT I-cache on CPU3
    [    0.062933] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
    [    0.062982] smp: Brought up 1 node, 4 CPUs
    [    0.097141] SMP: Total of 4 processors activated.
    [    0.101814] CPU features: detected: 32-bit EL0 Support
    [    0.106917] CPU features: detected: CRC32 instructions
    [    0.112057] CPU: All CPU(s) started at EL2
    [    0.116099] alternatives: patching kernel code
    [    0.121622] devtmpfs: initialized
    [    0.130529] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
    [    0.134631] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
    [    0.156604] xor: measuring software checksum speed
    [    0.193616]    8regs     :  2375.000 MB/sec
    [    0.233642]    32regs    :  2725.000 MB/sec
    [    0.273672]    arm64_neon:  2365.000 MB/sec
    [    0.273713] xor: using function: 32regs (2725.000 MB/sec)
    [    0.277587] pinctrl core: initialized pinctrl subsystem
    [    0.283699] NET: Registered protocol family 16
    [    0.288722] DMA: preallocated 256 KiB pool for atomic allocations
    [    0.293265] audit: initializing netlink subsys (disabled)
    [    0.298687] audit: type=2000 audit(0.240:1): state=initialized audit_enabled=0 res=1
    [    0.306330] cpuidle: using governor menu
    [    0.310370] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
    [    0.331389] HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages
    [    0.332444] HugeTLB registered 32.0 MiB page size, pre-allocated 0 pages
    [    0.339115] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
    [    0.345773] HugeTLB registered 64.0 KiB page size, pre-allocated 0 pages
    [    1.426759] DRBG: Continuing without Jitter RNG
    [    1.503657] raid6: neonx8   gen()  1545 MB/s
    [    1.571721] raid6: neonx8   xor()  1467 MB/s
    [    1.639775] raid6: neonx4   gen()  1488 MB/s
    [    1.707810] raid6: neonx4   xor()  1430 MB/s
    [    1.775878] raid6: neonx2   gen()  1135 MB/s
    [    1.843922] raid6: neonx2   xor()  1189 MB/s
    [    1.911982] raid6: neonx1   gen()   740 MB/s
    [    1.980023] raid6: neonx1   xor()   895 MB/s
    [    2.048112] raid6: int64x8  gen()  1166 MB/s
    [    2.116149] raid6: int64x8  xor()   763 MB/s
    [    2.184221] raid6: int64x4  gen()   985 MB/s
    [    2.252239] raid6: int64x4  xor()   740 MB/s
    [    2.320330] raid6: int64x2  gen()   684 MB/s
    [    2.388374] raid6: int64x2  xor()   600 MB/s
    [    2.456405] raid6: int64x1  gen()   452 MB/s
    [    2.524461] raid6: int64x1  xor()   459 MB/s
    [    2.524503] raid6: using algorithm neonx8 gen() 1545 MB/s
    [    2.528457] raid6: .... xor() 1467 MB/s, rmw enabled
    [    2.533387] raid6: using neon recovery algorithm
    [    2.538791] iommu: Default domain type: Translated 
    [    2.543080] SCSI subsystem initialized
    [    2.546715] usbcore: registered new interface driver usbfs
    [    2.552015] usbcore: registered new interface driver hub
    [    2.557293] usbcore: registered new device driver usb
    [    2.562331] mc: Linux media interface: v0.10
    [    2.566534] videodev: Linux video capture interface: v2.00
    [    2.571985] pps_core: LinuxPPS API ver. 1 registered
    [    2.576897] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
    [    2.585991] PTP clock support registered
    [    2.589883] EDAC MC: Ver: 3.0.0
    [    2.593426] zynqmp-ipi-mbox mailbox@ff990400: Registered ZynqMP IPI mbox with TX/RX channels.
    [    2.601696] zynqmp-ipi-mbox mailbox@ff90000: Registered ZynqMP IPI mbox with TX/RX channels.
    [    2.609967] FPGA manager framework
    [    2.613372] Advanced Linux Sound Architecture Driver Initialized.
    [    2.619619] Bluetooth: Core ver 2.22
    [    2.622843] NET: Registered protocol family 31
    [    2.627241] Bluetooth: HCI device and connection manager initialized
    [    2.633559] Bluetooth: HCI socket layer initialized
    [    2.638401] Bluetooth: L2CAP socket layer initialized
    [    2.643423] Bluetooth: SCO socket layer initialized
    [    2.648675] clocksource: Switched to clocksource arch_sys_counter
    [    2.654447] VFS: Disk quotas dquot_6.6.0
    [    2.658259] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
    [    2.669369] NET: Registered protocol family 2
    [    2.669829] tcp_listen_portaddr_hash hash table entries: 1024 (order: 2, 16384 bytes, linear)
    [    2.677872] TCP established hash table entries: 16384 (order: 5, 131072 bytes, linear)
    [    2.685821] TCP bind hash table entries: 16384 (order: 6, 262144 bytes, linear)
    [    2.693316] TCP: Hash tables configured (established 16384 bind 16384)
    [    2.699581] UDP hash table entries: 1024 (order: 3, 32768 bytes, linear)
    [    2.706170] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes, linear)
    [    2.713360] NET: Registered protocol family 1
    [    2.717876] RPC: Registered named UNIX socket transport module.
    [    2.723437] RPC: Registered udp transport module.
    [    2.728104] RPC: Registered tcp transport module.
    [    2.732772] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [    2.739448] PCI: CLS 0 bytes, default 64
    [    2.743663] hw perfevents: no interrupt-affinity property for /pmu, guessing.
    [    2.750340] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available
    [    2.758842] Initialise system trusted keyrings
    [    2.762369] workingset: timestamp_bits=46 max_order=19 bucket_order=0
    [    2.769506] NFS: Registering the id_resolver key type
    [    2.773702] Key type id_resolver registered
    [    2.777838] Key type id_legacy registered
    [    2.781824] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
    [    2.788495] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
    [    2.808425] NET: Registered protocol family 38
    [    2.808471] Key type asymmetric registered
    [    2.811300] Asymmetric key parser 'x509' registered
    [    2.816165] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247)
    [    2.823496] io scheduler mq-deadline registered
    [    2.827991] io scheduler kyber registered
    [    2.832715] GPIO IRQ not connected
    [    2.835338] XGpio: gpio@a0040000: registered, base is 504
    [    2.842474] xilinx-frmbuf a0000000.v_frmbuf_wr: Xilinx AXI frmbuf DMA_DEV_TO_MEM
    [    2.848130] xilinx-frmbuf a0000000.v_frmbuf_wr: Xilinx AXI FrameBuffer Engine Driver Probed!!
    [    2.856647] xilinx-frmbuf a00c0000.v_frmbuf_rd: Xilinx AXI frmbuf DMA_MEM_TO_DEV
    [    2.863944] xilinx-frmbuf a00c0000.v_frmbuf_rd: Xilinx AXI FrameBuffer Engine Driver Probed!!
    [    2.899021] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
    [    2.903958] cacheinfo: Unable to detect cache hierarchy for CPU 0
    [    2.910712] brd: module loaded
    [    2.916342] loop: module loaded
    [    2.917367] mtdoops: mtd device (mtddev=name/number) must be supplied
    [    2.921591] libphy: Fixed MDIO Bus: probed
    [    2.925329] tun: Universal TUN/TAP device driver, 1.6
    [    2.929435] CAN device driver interface
    [    2.934085] usbcore: registered new interface driver asix
    [    2.938561] usbcore: registered new interface driver ax88179_178a
    [    2.944578] usbcore: registered new interface driver cdc_ether
    [    2.950373] usbcore: registered new interface driver net1080
    [    2.955998] usbcore: registered new interface driver cdc_subset
    [    2.961879] usbcore: registered new interface driver zaurus
    [    2.967430] usbcore: registered new interface driver cdc_ncm
    [    2.973942] usbcore: registered new interface driver uas
    [    2.978328] usbcore: registered new interface driver usb-storage
    [    2.984451] gadgetfs: USB Gadget filesystem, version 24 Aug 2004
    [    2.990763] rtc_zynqmp ffa60000.rtc: registered as rtc0
    [    2.995491] i2c /dev entries driver
    [    2.999497] xilinx-video amba_pl@0:vcap_csi: device registered
    [    3.005224] xilinx-csi2rxss a0020000.mipi_csi2_rx_subsystem: Xilinx CSI2 Rx Subsystem device found!
    [    3.013681] xilinx-video amba_pl@0:vcap_csi: Entity type for entity a0020000.mipi_csi2_rx_subsystem was not initialized!
    [    3.025447] xilinx-tpg a0050000.v_tpg: invalid number of ports 0
    [    3.030459] xilinx-tpg: probe of a0050000.v_tpg failed with error -22
    [    3.037084] xilinx-vpss-scaler a0080000.v_proc_ss: xlnx,v-vpss-scaler-2.2 - compatible string is getting deprecated!
    [    3.047404] xilinx-video amba_pl@0:vcap_csi: Entity type for entity a0080000.v_proc_ss was not initialized!
    [    3.057016] xilinx-vpss-scaler a0080000.v_proc_ss: Num Hori Taps 8
    [    3.063150] xilinx-vpss-scaler a0080000.v_proc_ss: Num Vert Taps 8
    [    3.069291] xilinx-vpss-scaler a0080000.v_proc_ss: VPSS Scaler Probe Successful
    [    3.076701] xilinx-vtc a0060000.v_tc: device found, version 6.020
    [    3.082680] usbcore: registered new interface driver uvcvideo
    [    3.088321] USB Video Class driver (1.1.1)
    [    3.093082] Bluetooth: HCI UART driver ver 2.3
    [    3.096806] Bluetooth: HCI UART protocol H4 registered
    [    3.101903] Bluetooth: HCI UART protocol BCSP registered
    [    3.107195] Bluetooth: HCI UART protocol LL registered
    [    3.112282] Bluetooth: HCI UART protocol ATH3K registered
    [    3.117658] Bluetooth: HCI UART protocol Three-wire (H5) registered
    [    3.123910] Bluetooth: HCI UART protocol Intel registered
    [    3.129251] Bluetooth: HCI UART protocol QCA registered
    [    3.134455] usbcore: registered new interface driver bcm203x
    [    3.140076] usbcore: registered new interface driver bpa10x
    [    3.145608] usbcore: registered new interface driver bfusb
    [    3.151059] usbcore: registered new interface driver btusb
    [    3.156523] usbcore: registered new interface driver ath3k
    [    3.162050] EDAC MC: ECC not enabled
    [    3.165649] EDAC DEVICE0: Giving out device to module zynqmp-ocm-edac controller zynqmp_ocm: DEV ff960000.memory-controller (INTERRUPT)
    [    3.178123] sdhci: Secure Digital Host Controller Interface driver
    [    3.183732] sdhci: Copyright(c) Pierre Ossman
    [    3.188055] sdhci-pltfm: SDHCI platform and OF driver helper
    [    3.194130] ledtrig-cpu: registered to indicate activity on CPUs
    [    3.199698] zynqmp_firmware_probe Platform Management API v1.1
    [    3.205446] zynqmp_firmware_probe Trustzone version v1.0
    [    3.214337] zynqmp-pinctrl firmware:zynqmp-firmware:pinctrl: zynqmp pinctrl initialized
    [    3.242940] alg: No test for xilinx-zynqmp-aes (zynqmp-aes)
    [    3.243199] zynqmp_aes zynqmp_aes: AES Successfully Registered
    [    3.243199] 
    
    
    [    3.250445] alg: No test for xilinx-keccak-384 (zynqmp-keccak-384)
    [    3.256633] alg: No test for xilinx-zynqmp-rsa (zynqmp-rsa)
    [    3.262226] usbcore: registered new interface driver usbhid
    [    3.267441] usbhid: USB HID core driver
    [    3.271493] xlnk xlnk: Major 243
    [    3.274564] xlnk xlnk: xlnk driver loaded
    [    3.278429] xlnk xlnk: xlnk_pdev is not null
    [    3.285164] fpga_manager fpga0: Xilinx ZynqMP FPGA Manager registered
    [    3.289427] usbcore: registered new interface driver snd-usb-audio
    [    3.296205] pktgen: Packet Generator for packet performance testing. Version: 2.75
    [    3.303446] Initializing XFRM netlink socket
    [    3.307074] NET: Registered protocol family 10
    [    3.311878] Segment Routing with IPv6
    [    3.315149] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
    [    3.321295] NET: Registered protocol family 17
    [    3.325323] NET: Registered protocol family 15
    [    3.329737] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.
    [    3.342607] can: controller area network core (rev 20170425 abi 9)
    [    3.348784] NET: Registered protocol family 29
    [    3.353160] can: raw protocol (rev 20170425)
    [    3.357398] can: broadcast manager protocol (rev 20170425 t)
    [    3.363022] can: netlink gateway (rev 20190810) max_hops=1
    [    3.368586] Bluetooth: RFCOMM TTY layer initialized
    [    3.373321] Bluetooth: RFCOMM socket layer initialized
    [    3.378433] Bluetooth: RFCOMM ver 1.11
    [    3.382153] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
    [    3.387413] Bluetooth: BNEP filters: protocol multicast
    [    3.392605] Bluetooth: BNEP socket layer initialized
    [    3.397532] Bluetooth: HIDP (Human Interface Emulation) ver 1.2
    [    3.403417] Bluetooth: HIDP socket layer initialized
    [    3.408509] 9pnet: Installing 9P2000 support
    [    3.412611] Key type dns_resolver registered
    [    3.417195] registered taskstats version 1
    [    3.420892] Loading compiled-in X.509 certificates
    [    3.426127] Btrfs loaded, crc32c=crc32c-generic
    [    3.441277] ff000000.serial: ttyPS1 at MMIO 0xff000000 (irq = 40, base_baud = 6249999) is a xuartps
    [    3.445256] ff010000.serial: ttyPS0 at MMIO 0xff010000 (irq = 41, base_baud = 6249999) is a xuartps
    [    3.459715] printk: console [ttyPS0] enabled
    [    3.459715] printk: console [ttyPS0] enabled
    [    3.464013] printk: bootconsole [cdns0] disabled
    [    3.464013] printk: bootconsole [cdns0] disabled
    [    3.473165] of-fpga-region fpga-full: FPGA Region probed
    [    3.484119] xilinx-dpdma fd4c0000.dma: Xilinx DPDMA engine is probed
    [    3.490727] xilinx-zynqmp-dma fd500000.dma: ZynqMP DMA driver Probe success
    [    3.497843] xilinx-zynqmp-dma fd510000.dma: ZynqMP DMA driver Probe success
    [    3.504958] xilinx-zynqmp-dma fd520000.dma: ZynqMP DMA driver Probe success
    [    3.512074] xilinx-zynqmp-dma fd530000.dma: ZynqMP DMA driver Probe success
    [    3.519198] xilinx-zynqmp-dma fd540000.dma: ZynqMP DMA driver Probe success
    [    3.526315] xilinx-zynqmp-dma fd550000.dma: ZynqMP DMA driver Probe success
    [    3.533426] xilinx-zynqmp-dma fd560000.dma: ZynqMP DMA driver Probe success
    [    3.540540] xilinx-zynqmp-dma fd570000.dma: ZynqMP DMA driver Probe success
    [    3.547732] xilinx-zynqmp-dma ffa80000.dma: ZynqMP DMA driver Probe success
    [    3.554851] xilinx-zynqmp-dma ffa90000.dma: ZynqMP DMA driver Probe success
    [    3.561985] xilinx-zynqmp-dma ffaa0000.dma: ZynqMP DMA driver Probe success
    [    3.569104] xilinx-zynqmp-dma ffab0000.dma: ZynqMP DMA driver Probe success
    [    3.576220] xilinx-zynqmp-dma ffac0000.dma: ZynqMP DMA driver Probe success
    [    3.583337] xilinx-zynqmp-dma ffad0000.dma: ZynqMP DMA driver Probe success
    [    3.590457] xilinx-zynqmp-dma ffae0000.dma: ZynqMP DMA driver Probe success
    [    3.597574] xilinx-zynqmp-dma ffaf0000.dma: ZynqMP DMA driver Probe success
    [    3.604936] xilinx-psgtr fd400000.zynqmp_phy: Lane:1 type:8 protocol:4 pll_locked:yes
    [    3.616792] zynqmp_clk_divider_set_rate() set divider failed for spi1_ref_div1, ret = -13
    [    3.625617] xilinx-dp-snd-codec fd4a0000.zynqmp-display:zynqmp_dp_snd_codec0: Xilinx DisplayPort Sound Codec probed
    [    3.636347] xilinx-dp-snd-pcm zynqmp_dp_snd_pcm0: Xilinx DisplayPort Sound PCM probed
    [    3.644404] xilinx-dp-snd-pcm zynqmp_dp_snd_pcm1: Xilinx DisplayPort Sound PCM probed
    [    3.652997] xilinx-dp-snd-card fd4a0000.zynqmp-display:zynqmp_dp_snd_card: xilinx-dp-snd-codec-dai <-> xilinx-dp-snd-codec-dai mapping ok
    [    3.665550] xilinx-dp-snd-card fd4a0000.zynqmp-display:zynqmp_dp_snd_card: xilinx-dp-snd-codec-dai <-> xilinx-dp-snd-codec-dai mapping ok
    [    3.678274] xilinx-dp-snd-card fd4a0000.zynqmp-display:zynqmp_dp_snd_card: Xilinx DisplayPort Sound Card probed
    [    3.688447] OF: graph: no port node found in /amba/zynqmp-display@fd4a0000
    [    3.695474] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
    [    3.702086] [drm] No driver support for vblank timestamp query.
    [    3.708098] xlnx-drm xlnx-drm.0: bound fd4a0000.zynqmp-display (ops 0xffffffc010cd78f0)
    [    3.917102] Console: switching to colour frame buffer device 240x67
    [    3.936708] zynqmp-display fd4a0000.zynqmp-display: fb0: xlnxdrmfb frame buffer device
    [    3.944910] [drm] Initialized xlnx 1.0.0 20130509 for fd4a0000.zynqmp-display on minor 0
    [    3.953028] zynqmp-display fd4a0000.zynqmp-display: ZynqMP DisplayPort Subsystem driver probed
    [    3.963631] xilinx-axipmon ffa00000.perf-monitor: Probed Xilinx APM
    [    3.970174] xilinx-axipmon fd0b0000.perf-monitor: Probed Xilinx APM
    [    3.976695] xilinx-axipmon fd490000.perf-monitor: Probed Xilinx APM
    [    3.983191] xilinx-axipmon ffa10000.perf-monitor: Probed Xilinx APM
    [    3.990217] dwc3 fe200000.dwc3: Failed to get clk 'ref': -2
    [    3.996031] xilinx-psgtr fd400000.zynqmp_phy: Lane:2 type:0 protocol:3 pll_locked:yes
    [    4.007539] dwc3 fe300000.dwc3: Failed to get clk 'ref': -2
    [    4.013334] xilinx-psgtr fd400000.zynqmp_phy: Lane:3 type:1 protocol:3 pll_locked:yes
    [    4.023601] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    [    4.029097] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
    [    4.036870] xhci-hcd xhci-hcd.0.auto: hcc params 0x0238f625 hci version 0x100 quirks 0x0000000202010010
    [    4.046297] xhci-hcd xhci-hcd.0.auto: irq 55, io mem 0xfe300000
    [    4.052520] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.04
    [    4.060790] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [    4.068012] usb usb1: Product: xHCI Host Controller
    [    4.072885] usb usb1: Manufacturer: Linux 5.4.0-xilinx-v2020.1 xhci-hcd
    [    4.079494] usb usb1: SerialNumber: xhci-hcd.0.auto
    [    4.084702] hub 1-0:1.0: USB hub found
    [    4.088468] hub 1-0:1.0: 1 port detected
    [    4.092592] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    [    4.098094] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
    [    4.105747] xhci-hcd xhci-hcd.0.auto: Host supports USB 3.0 SuperSpeed
    [    4.112329] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
    [    4.120495] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.04
    [    4.128764] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [    4.135987] usb usb2: Product: xHCI Host Controller
    [    4.140861] usb usb2: Manufacturer: Linux 5.4.0-xilinx-v2020.1 xhci-hcd
    [    4.147467] usb usb2: SerialNumber: xhci-hcd.0.auto
    [    4.152574] hub 2-0:1.0: USB hub found
    [    4.156345] hub 2-0:1.0: 1 port detected
    [    4.162194] i2c i2c-0: Added multiplexed i2c bus 2
    [    4.167126] i2c i2c-0: Added multiplexed i2c bus 3
    [    4.172151] i2c i2c-0: Added multiplexed i2c bus 4
    [    4.177094] i2c i2c-0: Added multiplexed i2c bus 5
    [    4.182583] tps65086 6-005e: Failed to read revision register
    [    4.216516] random: fast init done
    [    4.424684] usb 1-1: new high-speed USB device number 2 using xhci-hcd
    [    4.577173] usb 1-1: New USB device found, idVendor=0424, idProduct=2744, bcdDevice= 2.21
    [    4.585361] usb 1-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
    [    4.592497] usb 1-1: Product: USB2744
    [    4.596153] usb 1-1: Manufacturer: Microchip Tech
    [    4.656404] hub 1-1:1.0: USB hub found
    [    4.660191] hub 1-1:1.0: 4 ports detected
    [    4.720359] usb 2-1: new SuperSpeed Gen 1 USB device number 2 using xhci-hcd
    [    4.745055] usb 2-1: New USB device found, idVendor=0424, idProduct=5744, bcdDevice= 2.21
    [    4.753239] usb 2-1: New USB device strings: Mfr=2, Product=3, SerialNumber=0
    [    4.760371] usb 2-1: Product: USB5744
    [    4.764031] usb 2-1: Manufacturer: Microchip Tech
    [    4.800393] hub 2-1:1.0: USB hub found
    [    4.804172] hub 2-1:1.0: 3 ports detected
    [    5.012698] usb 1-1.2: new full-speed USB device number 3 using xhci-hcd
    [    5.037576] i2c i2c-0: Added multiplexed i2c bus 6
    [    5.043053] ina2xx_adc 7-0040: error configuring the device
    [    5.048685] i2c i2c-0: Added multiplexed i2c bus 7
    [    5.053621] i2c i2c-0: Added multiplexed i2c bus 8
    [    5.058553] i2c i2c-0: Added multiplexed i2c bus 9
    [    5.063345] pca954x 0-0075: registered 8 multiplexed busses for I2C switch pca9548
    [    5.070943] cdns-i2c ff030000.i2c: 100 kHz mmio ff030000 irq 30
    [    5.077855] cdns-wdt fd4d0000.watchdog: Xilinx Watchdog Timer with timeout 60s
    [    5.085345] cdns-wdt ff150000.watchdog: Xilinx Watchdog Timer with timeout 10s
    [    5.119361] usb 1-1.2: New USB device found, idVendor=046d, idProduct=c52b, bcdDevice=12.03
    [    5.127714] usb 1-1.2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
    [    5.135024] usb 1-1.2: Product: USB Receiver
    [    5.139285] usb 1-1.2: Manufacturer: Logitech
    [    5.143749] mmc0: SDHCI controller on ff160000.mmc [ff160000.mmc] using ADMA 64-bit
    [    5.152244] sdhci-arasan ff170000.mmc: allocated mmc-pwrseq
    [    5.188997] mmc1: SDHCI controller on ff170000.mmc [ff170000.mmc] using ADMA 64-bit
    [    5.200753] input: gpio-keys as /devices/platform/gpio-keys/input/input0
    [    5.208006] rtc_zynqmp ffa60000.rtc: setting system clock to 1970-01-01T00:00:07 UTC (7)
    [    5.209103] mmc0: new high speed SDXC card at address 0001
    [    5.216101] of_cfs_init
    [    5.222248] mmcblk0: mmc0:0001 00000 59.6 GiB 
    [    5.224048] of_cfs_init: OK
    [    5.230061]  mmcblk0: p1 p2
    [    5.231422] cfg80211: Loading compiled-in X.509 certificates for regulatory database
    [    5.248781] mmc1: new high speed SDIO card at address 0001
    [    5.266775] input: Logitech USB Receiver as /devices/platform/amba/ff9e0000.usb1/fe300000.dwc3/xhci-hcd.0.auto/usb1/1-1/1-1.2/1-1.2:1.0/0003:046D:C52B.0001/input/input1
    [    5.341044] hid-generic 0003:046D:C52B.0001: input: USB HID v1.11 Keyboard [Logitech USB Receiver] on usb-xhci-hcd.0.auto-1.2/input0
    [    5.356682] input: Logitech USB Receiver Mouse as /devices/platform/amba/ff9e0000.usb1/fe300000.dwc3/xhci-hcd.0.auto/usb1/1-1/1-1.2/1-1.2:1.1/0003:046D:C52B.0002/input/input2
    [    5.372530] input: Logitech USB Receiver Consumer Control as /devices/platform/amba/ff9e0000.usb1/fe300000.dwc3/xhci-hcd.0.auto/usb1/1-1/1-1.2/1-1.2:1.1/0003:046D:C52B.0002/input/input3
    [    5.381496] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
    [    5.395557] clk: Not disabling unused clocks
    [    5.399825] ALSA device list:
    [    5.402782]   #0: DisplayPort monitor
    [    5.406877] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
    [    5.415490] cfg80211: failed to load regulatory.db
    [    5.448836] input: Logitech USB Receiver System Control as /devices/platform/amba/ff9e0000.usb1/fe300000.dwc3/xhci-hcd.0.auto/usb1/1-1/1-1.2/1-1.2:1.1/0003:046D:C52B.0002/input/input4
    [    5.465266] hid-generic 0003:046D:C52B.0002: input: USB HID v1.11 Mouse [Logitech USB Receiver] on usb-xhci-hcd.0.auto-1.2/input1
    [    5.479431] hid-generic 0003:046D:C52B.0003: device has no listeners, quitting
    [    5.500193] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
    [    5.508323] VFS: Mounted root (ext4 filesystem) on device 179:2.
    [    5.523303] devtmpfs: mounted
    [    5.526563] Freeing unused kernel memory: 704K
    [    5.531087] Run /sbin/init as init process
    [    5.564697] usb 1-1.4: new high-speed USB device number 4 using xhci-hcd
    
    
    INIT: version 2.88 booting
    
    
    [    5.669452] usb 1-1.4: New USB device found, idVendor=0424, idProduct=2740, bcdDevice= 2.00
    [    5.677803] usb 1-1.4: New USB device strings: Mfr=1, Product=2, SerialNumber=0
    [    5.685115] usb 1-1.4: Product: Hub Controller
    [    5.689550] usb 1-1.4: Manufacturer: Microchip Tech
    Starting udev
    [    6.103649] udevd[163]: starting version 3.2.8
    [    6.122041] random: udevd: uninitialized urandom read (16 bytes read)
    [    6.129115] random: udevd: uninitialized urandom read (16 bytes read)
    [    6.135577] random: udevd: uninitialized urandom read (16 bytes read)
    [    6.191106] udevd[164]: starting eudev-3.2.8
    [    6.364454] ap1302: loading out-of-tree module taints kernel.
    [    6.372216] AP1302 4-003c: Probe: AP1302
    [    6.376254] debugfs: Directory '4-003c' with parent 'regmap' already present!
    [    6.437989] zynqmp_r5_remoteproc zynqmp-rpu: RPU core_conf: split
    [    6.444458] remoteproc remoteproc0: r5@0 is available
    [    6.467142] AP1302 4-003c: AP1302 Chip ID is 0x265
    [    6.473362] AP1302 4-003c: AP1302 Chip Rev is 0x206
    [    6.478360] AP1302 4-003c: Start to load firmware.
    [    7.042617] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.
    [   12.006250] random: crng init done
    [   12.009643] random: 4 urandom warning(s) missed due to ratelimiting
    [   13.010245] AP1302 4-003c: Load firmware successfully.
    [   13.017637] AP1302 4-003c: AP1302 probe Success Done
    [   13.092459] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null)
    Wed Aug 19 13:14:58 UTC 2020
    
    
    Starting Ultra96 AP setup daemon.
    
    
    Turning Ultra96 WiFi & Bluetooth LEDs ON...done.
    
    
    
    
    
    [   15.260322] wifi_pm : 0
    [   15.262865] wifi_pm : 1
    [   15.265676] wilc_sdio mmc1:0001:1: Driver Initializing success
    Starting Flask server deamon to serve Ultra96 startup page[   15.275016] WILC POWER UP
    [   15.280721] wilc_sdio mmc1:0001:1: SDIO speed: 50000000
    [   15.286277] wilc_sdio mmc1:0001:1: chipid 003000d0
    .
    
    
    
    
    INIT: Entering runlevel: 5
    
    
    
    
    Starting system message bus: dbus.
    
    
    Configuring network interfaces... Successfully initialized wpa_supplicant
    
    
    done.
    
    
    Starting Connection Manager
    
    
    Starting haveged: haveged: listening socket at 3
    
    
    haveged: haveged starting up
    
    
    
    
    
    
    
    
    
    
    
    
    Starting Dropbear SSH server: dropbear.
    
    
    Starting rpcbind daemon...done.
    
    
    starting statd: done
    
    
    Starting bluetooth: bluetoothd.
    
    
    Starting internet superserver: inetd.
    
    
    exportfs: can't open /etc/exports for reading
    
    
    NFS daemon support not enabled in kernel
    
    
    Starting ntpd: done
    
    
    Starting syslogd/klogd: done
    
    
    Starting internet superserver: xinetd.
    
    
     * Starting Avahi mDNS/DNS-SD Daemon: avahi-daemon
    
    
     [A [74G[ ok ]
    
    
    Starting Telephony daemon
    
    
    Starting watchdog daemon...done
    
    
    Starting Linux NFC daemon
    
    
    Starting tcf-agent: OK
    
    
    
    
    PetaLinux 2020.1 ultra96v2-2020-1 ttyPS0
    
    
    ultra96v2-2020-1 login: root
    

      • Once the board has booted, the 'modetest' command can be used to identify the monitor connected and whether or not if it will support the images from the Ultra96-V2 and Dual Camera Mezz combo
        • Note: There is where I ran into an issue since I apparently did not have a monitor that supported 1080p which is required to run the images. Also, I had a Passive miniDP to HDMI cable where an Active on is required.
        • Here, the monitor only supports up to 1024x768 where 1920x1080 is required
    root@ultra96v2-2020-1:~# modetest -M xlnx 
    [   50.474651] zynqmp-display fd4a0000.zynqmp-display: DP-1: EDID is invalid:
    [   50.481546] [00] BAD  00 ff ff ff ff ff ff 00 ff ff ff ff ff ff ff ff
    [   50.488071] [00] BAD  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
    [   50.494586] [00] BAD  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
    [   50.501106] [00] BAD  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
    [   50.507623] [00] BAD  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
    [   50.514143] [00] BAD  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
    [   50.520659] [00] BAD  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
    [   50.527179] [00] BAD  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
    Encoders:
    id crtc type possible crtcs possible clones
    41 40 TMDS 0x00000001 0x00000000
    
    
    Connectors:
    id encoder status name size (mm) modes encoders
    42 41 connected DP-1            600x330 5 41
      modes:
    name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot)
      1024x768 60.00 1024 1048 1184 1344 768 771 777 806 65000 flags: nhsync, nvsync; type: driver
      800x600 60.32 800 840 968 1056 600 601 605 628 40000 flags: phsync, pvsync; type: driver
      800x600 56.25 800 824 896 1024 600 601 603 625 36000 flags: phsync, pvsync; type: driver
      848x480 60.00 848 864 976 1088 480 486 494 517 33750 flags: phsync, pvsync; type: driver
      640x480 59.94 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver
      props:
    1 EDID:
    flags: immutable blob
    blobs:
    
    
    value:
    00ffffffffffff0004727e085ea87003
    251e0103803c2178ea3135a5554ea126
    0c5054a54b00714f81809500b300a9c0
    810081c09040f14480c870381e403020
    350055502100001e000000fd00304b1e
    5515000a202020202020000000fc004b
    323732484c20480a20202020000000ff
    00544e304141303031335730310a01fa
    020325f449900403011412051f132309
    07078301000065030c002000681a0000
    0101304be6023a801871382d40582c45
    0055502100001a011d007251d01e206e
    28550055502100001e8c0ad08a20e02d
    10103e96005550210000180000000000
    00000000000000000000000000000000
    0000000000000000000000000000002d
    

      • If the monitor does not support 1080p, then the 'run_1920_1080' script which is included in the OOB image will fail.
    root@ultra96v2-2020-1:~# run_1920_1080
    722
    setting mode 1920x1080-75.00Hz@RG16 on connectors 42, crtc 40
    testing 1920x1080@YUYV overlay plane 38
    Setting pipeline to PAUSED ...
    Pipeline is live and does not need PREROLL ...
    /GstPipeline:pipeline0/GstKMSSink:kmssink0: display-width = 1920
    /GstPipeline:pipeline0/GstKMSSink:kmssink0: display-height = 1080
    Setting pipeline to PLAYING ...
    New clock: GstSystemClock
    /GstPipeline:pipeline0/GstV4l2Src:v4l2src0.GstPad:src: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    /GstPipeline:pipeline0/GstCapsFilter:capsfilter0.GstPad:src: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    /GstPipeline:pipeline0/GstVideoConvert:videoconvert0.GstPad:src: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    /GstPipeline:pipeline0/GstKMSSink:kmssink0.GstPad:sink: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    /GstPipeline:pipeline0/GstVideoConvert:videoconvert0.GstPad:sink: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    /GstPipeline:pipeline0/GstCapsFilter:capsfilter0.GstPad:sink: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    ^Chandling interrupt.
    Interrupt: Stopping pipeline ...
    Execution ended after 0:00:10.914026340
    Setting pipeline to PAUSED ...
    Setting pipeline to READY ...
    Setting pipeline to NULL ...
    Freeing pipeline ...
    /usr/bin/run_1920_1080: line 20: kill: (722) - No such process
    

      • With a monitor that supports 1080p and an Active miniDP to HDMI cable, the monitor is identified with the supported resolution of 1920x1080.
    root@ultra96v2-2020-1:~# modetest -M xlnx
    Encoders:
    id crtc type possible crtcs possible clones
    41 40 TMDS 0x00000001 0x00000000
    
    
    Connectors:
    id encoder status name size (mm) modes encoders
    42 41 connected DP-1            600x330 31 41
      modes:
    name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot)
      1920x1080 75.00 1920 1968 2000 2120 1080 1083 1088 1110 176490 flags: phsync, pvsync; type: preferred, driver
      1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, nvsync; type: driver
      1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: driver
      1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags: phsync, pvsync; type: driver
      1920x1080 50.00 1920 2448 2492 2640 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: driver
      1680x1050 59.88 1680 1728 1760 1840 1050 1053 1059 1080 119000 flags: phsync, nvsync; type: driver
      1400x1050 59.95 1400 1448 1480 1560 1050 1053 1057 1080 101000 flags: phsync, nvsync; type: driver
      1600x900 60.00 1600 1624 1704 1800 900 901 904 1000 108000 flags: phsync, pvsync; type: driver
      1280x1024 75.02 1280 1296 1440 1688 1024 1025 1028 1066 135000 flags: phsync, pvsync; type: driver
      1280x1024 60.02 1280 1328 1440 1688 1024 1025 1028 1066 108000 flags: phsync, pvsync; type: driver
      1440x900 59.90 1440 1488 1520 1600 900 903 909 926 88750 flags: phsync, nvsync; type: driver
      1280x800 59.91 1280 1328 1360 1440 800 803 809 823 71000 flags: phsync, nvsync; type: driver
      1152x864 75.00 1152 1216 1344 1600 864 865 868 900 108000 flags: phsync, pvsync; type: driver
      1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver
      1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver
      1280x720 59.94 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync, pvsync; type: driver
      1280x720 50.00 1280 1720 1760 1980 720 725 730 750 74250 flags: phsync, pvsync; type: driver
      1024x768 75.03 1024 1040 1136 1312 768 769 772 800 78750 flags: phsync, pvsync; type: driver
      1024x768 60.00 1024 1048 1184 1344 768 771 777 806 65000 flags: nhsync, nvsync; type: driver
      800x600 75.00 800 816 896 1056 600 601 604 625 49500 flags: phsync, pvsync; type: driver
      800x600 60.32 800 840 968 1056 600 601 605 628 40000 flags: phsync, pvsync; type: driver
      720x576 50.00 720 732 796 864 576 581 586 625 27000 flags: nhsync, nvsync; type: driver
      720x480 60.00 720 736 798 858 480 489 495 525 27027 flags: nhsync, nvsync; type: driver
      720x480 60.00 720 736 798 858 480 489 495 525 27027 flags: nhsync, nvsync; type: driver
      720x480 59.94 720 736 798 858 480 489 495 525 27000 flags: nhsync, nvsync; type: driver
      720x480 59.94 720 736 798 858 480 489 495 525 27000 flags: nhsync, nvsync; type: driver
      640x480 75.00 640 656 720 840 480 481 484 500 31500 flags: nhsync, nvsync; type: driver
      640x480 60.00 640 656 752 800 480 490 492 525 25200 flags: nhsync, nvsync; type: driver
      640x480 59.94 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver
      640x480 59.94 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver
      720x400 70.08 720 738 846 900 400 412 414 449 28320 flags: nhsync, pvsync; type: driver
      props:
    1 EDID:
    flags: immutable blob
    blobs:
    
    
    value:
    00ffffffffffff0004727e085ea87003
    251e0103803c2178ea3135a5554ea126
    0c5054a54b00714f81809500b300a9c0
    810081c09040f14480c870381e403020
    350055502100001e000000fd00304b1e
    5515000a202020202020000000fc004b
    323732484c20480a20202020000000ff
    00544e304141303031335730310a01fa
    020325f449900403011412051f132309
    07078301000065030c002000681a0000
    0101304be6023a801871382d40582c45
    0055502100001a011d007251d01e206e
    28550055502100001e8c0ad08a20e02d
    10103e96005550210000180000000000
    00000000000000000000000000000000
    0000000000000000000000000000002d
    

     

      • Now, the  'run_1920_1080' script will run as expected:
    root@ultra96v2-2020-1:~# run_1920_1080 
    setting mode 1920x1080-75.00Hz@RG16 on connectors 42, crtc 40
    testing 1920x1080@YUYV overlay plane 38
    Setting pipeline to PAUSED ...
    Pipeline is live and does not need PREROLL ...
    /GstPipeline:pipeline0/GstKMSSink:kmssink0: display-width = 1920
    /GstPipeline:pipeline0/GstKMSSink:kmssink0: display-height = 1080
    Setting pipeline to PLAYING ...
    New clock: GstSystemClock
    /GstPipeline:pipeline0/GstV4l2Src:v4l2src0.GstPad:src: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    /GstPipeline:pipeline0/GstCapsFilter:capsfilter0.GstPad:src: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    /GstPipeline:pipeline0/GstVideoConvert:videoconvert0.GstPad:src: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    /GstPipeline:pipeline0/GstKMSSink:kmssink0.GstPad:sink: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    /GstPipeline:pipeline0/GstVideoConvert:videoconvert0.GstPad:sink: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    /GstPipeline:pipeline0/GstCapsFilter:capsfilter0.GstPad:sink: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    ^Chandling interrupt.
    Interrupt: Stopping pipeline ...
    Execution ended after 0:12:35.809132410
    Setting pipeline to PAUSED ...
    Setting pipeline to READY ...
    Setting pipeline to NULL ...
    Freeing pipeline ...
    

     

     

      • Video of Dual Camera Mezz OOB image running.

     

        PetaLinux 2020.1 Build

    • The next example I attempted with the Ultra96-V2 and Dual Camera Mezz was to run through the Ultra96-V2 Dual Camera Mezzanine Petalinux Build Instructions posted on element14 by Chris Ammann.

                    https://www.element14.com/community/groups/fpga-group/blog/2021/01/14/ultra96-v2-dual-camera-mezzanine-petalinux-build-instructions

      • This involved running through the entire command line sequence to both build PetaLinux for the Ultra96 with Dual Camera Mezz support, as well as build the Hard Definition project if it is not foun in the proper location.
      • The process pulls the Board Definition Files (bdf), Hardware Description Language (hdl) files as well as the PetaLinux project required to build an image.
        • NOTE: This tooke over a day and half to complete on my system.

     

      • Source the setting scripts for PetaLinux, Vivado and Vitis:
    vitis20201@vitis20201-VirtualBox:~/develop$ . /tools/Xilinx/Vitis/2020.1/settings64.sh
    vitis20201@vitis20201-VirtualBox:~/develop$ . /opt/xilinx/xrt/setup.sh
    vitis20201@vitis20201-VirtualBox:~/develop$ . /tools/Xilinx/Vivado/2020.1/settings64.sh
    vitis20201@vitis20201-VirtualBox:~/develop$ . /tools/petalinux-v2020.1-final/settings.sh
    

     

      • Create a location on the Ubuntu system to build the image:
    vitis20201@vitis20201-VirtualBox:~/develop$ rm -rf git/
    
    
    vitis20201@vitis20201-VirtualBox:~/develop$ mkdir -p git/avnet
    
    
    vitis20201@vitis20201-VirtualBox:~/develop$ cd git/avnet/
    

     

      • Clone the BDF files from the Avnet GitHub repo:
    vitis20201@vitis20201-VirtualBox:~/develop/git/avnet$ git clone https://github.com/Avnet/bdf.git
    Cloning into 'bdf'...
    remote: Enumerating objects: 123, done.
    remote: Counting objects: 100% (123/123), done.
    remote: Compressing objects: 100% (86/86), done.
    remote: Total 380 (delta 48), reused 110 (delta 37), pack-reused 257
    Receiving objects: 100% (380/380), 23.20 MiB | 4.12 MiB/s, done.
    Resolving deltas: 100% (145/145), done
    

     

      • Clone the HDL files from the Avnet GitHub repo.
    vitis20201@vitis20201-VirtualBox:~/develop/git/avnet$ git clone https://github.com/Avnet/hdl.git
    Cloning into 'hdl'...
    remote: Enumerating objects: 669, done.
    remote: Counting objects: 100% (669/669), done.
    remote: Compressing objects: 100% (244/244), done.
    remote: Total 5006 (delta 442), reused 595 (delta 372), pack-reused 4337
    Receiving objects: 100% (5006/5006), 14.86 MiB | 2.81 MiB/s, done.
    Resolving deltas: 100% (3006/3006), done.
    Checking out files: 100% (1874/1874), done.
    

     

      • Clone the PetaLinux files from the Avnet GitHub.
    vitis20201@vitis20201-VirtualBox:~/develop/git/avnet$ git clone https://github.com/Avnet/petalinux.git
    Cloning into 'petalinux'...
    remote: Enumerating objects: 209, done.
    remote: Counting objects: 100% (209/209), done.
    remote: Compressing objects: 100% (97/97), done.
    remote: Total 3039 (delta 158), reused 150 (delta 106), pack-reused 2830
    Receiving objects: 100% (3039/3039), 6.14 MiB | 2.99 MiB/s, done.
    Resolving deltas: 100% (1676/1676), done.
    

     

      • Check out the master branch for the bdf repo and 2020.1 Release for hdl and petalinux repo
    vitis20201@vitis20201-VirtualBox:~/develop/git/avnet$ cd bdf/
    
    
    vitis20201@vitis20201-VirtualBox:~/develop/git/avnet/bdf$ git checkout master
    Already on 'master'
    Your branch is up to date with 'origin/master'.
    
    
    vitis20201@vitis20201-VirtualBox:~/develop/git/avnet/bdf$ cd ../petalinux/
    
    
    vitis20201@vitis20201-VirtualBox:~/develop/git/avnet/petalinux$ git checkout 2020.1
    Branch '2020.1' set up to track remote branch '2020.1' from 'origin'.
    Switched to a new branch '2020.1'
    
    
    vitis20201@vitis20201-VirtualBox:~/develop/git/avnet/petalinux$ cd ../hdl/
    
    
    vitis20201@vitis20201-VirtualBox:~/develop/git/avnet/hdl$ git checkout 2020.1
    Branch '2020.1' set up to track remote branch '2020.1' from 'origin'.
    Switched to a new branch '2020.1'
    vitis20201@vitis20201-VirtualBox:~/develop/git/avnet/hdl$ ls
    avnet_logo.png  Boards  IP  Projects  README.md  Scripts  Software
    

     

      • Change directory to the petalinux folder and run the 'make_ultra96v2_dualcam.sh' script to build the PetaLinux image.
        • NOTE: This will take a long time. It took over 36 hours on my system.
    vitis20201@vitis20201-VirtualBox:~/develop/git/avnet/petalinux$ ./scripts/make_ultra96v2_dualcam.sh
    
    
    Verifying repositories ...
    
    
    
    
    Checking Environment (Xilinx tools sourced) ...
    
    
    
    
    Checking 'ultra96v2_dualcam/ULTRA96V2_2020_1' Vivado Project ...
    
    
    
    
    No built Vivado HW project ultra96v2_dualcam/ULTRA96V2_2020_1 found.
    Will build the hardware platform now.
    
    
    
    
    ****** Vivado v2020.1 (64-bit)
      **** SW Build 2902540 on Wed May 27 19:54:35 MDT 2020
      **** IP Build 2902112 on Wed May 27 22:43:36 MDT 2020
        ** Copyright 1986-2020 Xilinx, Inc. All Rights Reserved.
    
    
    source make_ultra96v2_dualcam.tcl -notrace
    
    
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
    *-                                                     -*
    *-        Welcome to the Avnet Project Builder         -*
    *-                                                     -*
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
    
    
    BDF path set to /home/vitis20201/develop/git/avnet/bdf 
    
    
    
    
    
    
    +------------------+------------------------------------+
    | Setting          |     Configuration                  |
    +------------------+------------------------------------+
    | Board            |     ULTRA96V2                      |
    +------------------+------------------------------------+
    | Project          |     ultra96v2_dualcam              |
    +------------------+------------------------------------+
    | SDK              |     no                             |
    +------------------+------------------------------------+
    | No Close Project |     no                             |
    +------------------+------------------------------------+
    | Version override |     yes                            |
    +------------------+------------------------------------+
    | Device           |     zynqmp                         |
    +------------------+------------------------------------+
    
    
    
    
    
    
    Overriding Version Check, Please Check the Design for Validity!
    
    
    
    
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
     Selected Board and Project as:
     ULTRA96V2 and ultra96v2_dualcam
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
    
    
    
    
    Not Requesting Tag
    Setting Up Project ultra96v2_dualcam...
    
    
    ***** Creating Vivado Project...
    create_project: Time (s): cpu = 00:00:04 ; elapsed = 00:00:10 . Memory (MB): peak = 2032.109 ; gain = 2.016 ; free physical = 4557 ; free virtual = 8669
    ***** Assigning Vivado Project board_part Property to ultra96v2...
    
    
    ***** Generating IP...
    
    
    ***** Updating Vivado to include IP Folder
    INFO: [IP_Flow 19-234] Refreshing IP repositories
    INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/vitis20201/develop/git/avnet/hdl/IP'.
    INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/tools/Xilinx/Vivado/2020.1/data/ip'.
    update_ip_catalog: Time (s): cpu = 00:00:06 ; elapsed = 00:00:15 . Memory (MB): peak = 2032.109 ; gain = 0.000 ; free physical = 4506 ; free virtual = 8655
    
    
    ***** Creating Block Design...
    Wrote  : </home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ULTRA96V2.bd> 
    create_bd_design: Time (s): cpu = 00:00:01 ; elapsed = 00:00:05 . Memory (MB): peak = 2096.023 ; gain = 21.051 ; free physical = 4449 ; free virtual = 8637
    
    
    ***** Add defined IP blocks to Block Design...
    Wrote  : </home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ULTRA96V2.bd> 
    Wrote  : </home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ULTRA96V2.bd> 
    INFO: [Device 21-403] Loading part xczu3eg-sbva484-1-i
    INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI
    WARNING: [IP_Flow 19-3374] An attempt to modify the value of disabled parameter 'RX_EQUALIZATION_S' from 'NONE' to 'EQ_NONE' has been ignored for IP 'ULTRA96V2_mipi_csi2_rx_subsyst_0_0/bd_1b41/bd_1b41_phy_0/bd_1b41_phy_0_hssio_rx'
    create_bd_cell: Time (s): cpu = 00:00:07 ; elapsed = 00:00:07 . Memory (MB): peak = 2594.449 ; gain = 0.000 ; free physical = 3195 ; free virtual = 7787
    create_bd_cell: Time (s): cpu = 00:00:38 ; elapsed = 00:01:21 . Memory (MB): peak = 2594.449 ; gain = 498.422 ; free physical = 3192 ; free virtual = 7784
    INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI
    WARNING: [IP_Flow 19-3374] An attempt to modify the value of disabled parameter 'RX_EQUALIZATION_S' from 'NONE' to 'EQ_NONE' has been ignored for IP 'ULTRA96V2_mipi_csi2_rx_subsyst_0_0/bd_1b41/bd_1b41_phy_0/bd_1b41_phy_0_hssio_rx'
    create_bd_cell: Time (s): cpu = 00:00:09 ; elapsed = 00:00:09 . Memory (MB): peak = 2594.449 ; gain = 0.000 ; free physical = 3172 ; free virtual = 7765
    WARNING: [BD 41-1731] Type mismatch between connected pins: /system_rst_out(rst) and /phy/system_rst_out(undef)
    INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI
    INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI
    INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI
    INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI
    WARNING: [BD 41-1306] The connection to interface pin /reset_sel_axi_mm/gpio_io_o is being overridden by the user. This pin will not be connected as a part of interface connection GPIO
    WARNING: [BD 41-1306] The connection to interface pin /reset_sel_axi_mm/gpio_io_i is being overridden by the user. This pin will not be connected as a part of interface connection GPIO
    WARNING: [BD 41-1731] Type mismatch between connected pins: /reset_sel_axi_mm/gpio_io_o(undef) and /smartconnect_1/aresetn(rst)
    WARNING: [BD 41-1731] Type mismatch between connected pins: /reset_sel_axi_mm/gpio_io_o(undef) and /vdma_trunc/aresetn(rst)
    WARNING: [BD 41-1731] Type mismatch between connected pins: /reset_sel_axi_mm/gpio_io_o(undef) and /vdma_pad/aresetn(rst)
    WARNING: [BD 41-1731] Type mismatch between connected pins: /reset_sel_axi_mm/gpio_io_o(undef) and /video_router/M03_AXIS_ARESETN(rst)
    WARNING: [BD 41-1731] Type mismatch between connected pins: /reset_sel_axi_mm/gpio_io_o(undef) and /video_router/S03_AXIS_ARESETN(rst)
    WARNING: [BD 41-1731] Type mismatch between connected pins: /reset_sel_axi_mm/gpio_io_o(undef) and /video_router/S09_AXIS_ARESETN(rst)
    WARNING: [BD 41-1731] Type mismatch between connected pins: /reset_sel_axi_mm/gpio_io_o(undef) and /dint/ap_rst_n(rst)
    WARNING: [BD 41-1731] Type mismatch between connected pins: /reset_sel_axi_mm/gpio_io_o(undef) and /deint_cc/m_axis_aresetn(rst)
    WARNING: [BD 41-1306] The connection to interface pin /reset_sel_axis/gpio_io_o is being overridden by the user. This pin will not be connected as a part of interface connection GPIO
    WARNING: [BD 41-1306] The connection to interface pin /reset_sel_axis/gpio_io_i is being overridden by the user. This pin will not be connected as a part of interface connection GPIO
    WARNING: [BD 41-1306] The connection to interface pin /deint_ss/m_axis_tuser is being overridden by the user. This pin will not be connected as a part of interface connection M_AXIS
    WARNING: [BD 41-1306] The connection to interface pin /deint_cc/s_axis_tuser is being overridden by the user. This pin will not be connected as a part of interface connection S_AXIS
    WARNING: [BD 41-1306] The connection to interface pin /deint_cc/m_axis_tuser is being overridden by the user. This pin will not be connected as a part of interface connection M_AXIS
    WARNING: [BD 41-1306] The connection to interface pin /dint/s_axis_video_TUSER is being overridden by the user. This pin will not be connected as a part of interface connection s_axis_video
    1
    true
    true
    Slave segment '/axi_vdma/S_AXI_LITE/Reg' is being assigned into address space '/s_axi_ctrl' at <0x0000_0000 [ 64K ]>.
    Slave segment '/csc/s_axi_CTRL/Reg' is being assigned into address space '/s_axi_ctrl' at <0x0001_0000 [ 64K ]>.
    Slave segment '/dint/s_axi_CTRL/Reg' is being assigned into address space '/s_axi_ctrl' at <0x0002_0000 [ 64K ]>.
    Slave segment '/hcr/s_axi_CTRL/Reg' is being assigned into address space '/s_axi_ctrl' at <0x0003_0000 [ 64K ]>.
    Slave segment '/hsc/s_axi_CTRL/Reg' is being assigned into address space '/s_axi_ctrl' at <0x0004_0000 [ 64K ]>.
    Slave segment '/ltr/s_axi_CTRL/Reg' is being assigned into address space '/s_axi_ctrl' at <0x0005_0000 [ 64K ]>.
    Slave segment '/reset_sel_axi_mm/S_AXI/Reg' is being assigned into address space '/s_axi_ctrl' at <0x0006_0000 [ 64K ]>.
    Slave segment '/reset_sel_axis/S_AXI/Reg' is being assigned into address space '/s_axi_ctrl' at <0x0007_0000 [ 64K ]>.
    Slave segment '/vcr_i/s_axi_CTRL/Reg' is being assigned into address space '/s_axi_ctrl' at <0x0008_0000 [ 64K ]>.
    Slave segment '/vcr_o/s_axi_CTRL/Reg' is being assigned into address space '/s_axi_ctrl' at <0x0009_0000 [ 64K ]>.
    Slave segment '/video_router/xbar/S_AXI_CTRL/Reg' is being assigned into address space '/s_axi_ctrl' at <0x000A_0000 [ 64K ]>.
    Slave segment '/vsc/s_axi_CTRL/Reg' is being assigned into address space '/s_axi_ctrl' at <0x000B_0000 [ 64K ]>.
    create_bd_cell: Time (s): cpu = 00:00:06 ; elapsed = 00:00:08 . Memory (MB): peak = 2594.449 ; gain = 0.000 ; free physical = 3097 ; free virtual = 7694
    INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI
    WARNING: [BD 41-1306] The connection to interface pin /reset_sel_axis/gpio_io_i is being overridden by the user. This pin will not be connected as a part of interface connection GPIO
    WARNING: [BD 41-1306] The connection to interface pin /reset_sel_axis/gpio_io_o is being overridden by the user. This pin will not be connected as a part of interface connection GPIO
    0
    false
    false
    Slave segment '/hsc/s_axi_CTRL/Reg' is being assigned into address space '/s_axi_ctrl' at <0x0000_0000 [ 64K ]>.
    Slave segment '/reset_sel_axis/S_AXI/Reg' is being assigned into address space '/s_axi_ctrl' at <0x0001_0000 [ 64K ]>.
    Slave segment '/vsc/s_axi_CTRL/Reg' is being assigned into address space '/s_axi_ctrl' at <0x0002_0000 [ 64K ]>.
    Wrote  : </home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ULTRA96V2.bd> 
    Wrote  : </home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ui/bd_8b17350d.ui> 
    WARNING: [BD 41-1306] The connection to interface pin /GPIO/axi_gpio_0/gpio_io_o is being overridden by the user. This pin will not be connected as a part of interface connection GPIO
    Wrote  : </home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ULTRA96V2.bd> 
    INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI
    INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI
    WARNING: [BD 41-1306] The connection to interface pin /LIVE_VIDEO_DP/alpha_control_0/video_active_out is being overridden by the user. This pin will not be connected as a part of interface connection video_out
    WARNING: [BD 41-1306] The connection to interface pin /LIVE_VIDEO_DP/alpha_control_0/video_dout is being overridden by the user. This pin will not be connected as a part of interface connection video_out
    WARNING: [BD 41-1306] The connection to interface pin /LIVE_VIDEO_DP/alpha_control_0/video_hsync_out is being overridden by the user. This pin will not be connected as a part of interface connection video_out
    WARNING: [BD 41-1306] The connection to interface pin /LIVE_VIDEO_DP/alpha_control_0/video_vsync_out is being overridden by the user. This pin will not be connected as a part of interface connection video_out
    Wrote  : </home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ULTRA96V2.bd> 
    INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI
    INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI
    CRITICAL WARNING: [PSU-1]  Actual device frequency is : 479.995209. Minimum actual device frequency supported for DDR for current part is 500.000000. 
    create_bd_cell: Time (s): cpu = 00:00:05 ; elapsed = 00:00:07 . Memory (MB): peak = 2717.453 ; gain = 106.996 ; free physical = 2937 ; free virtual = 7568
    INFO: [PSU-0] Address Range of DDR (0x1ff00000 to 0x1fffffff) is reserved by PMU for internal purpose.
    INFO: [PSU-1]  DP_AUDIO clock source: RPLL is also being used by other peripheral clocks. Their outputs may get impacted if any driver changes DP_AUDIO PLL source to support runtime audio change 
    Wrote  : </home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ULTRA96V2.bd> 
    INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI
    create_bd_cell: Time (s): cpu = 00:00:47 ; elapsed = 00:01:32 . Memory (MB): peak = 3177.770 ; gain = 460.316 ; free physical = 2451 ; free virtual = 7102
    WARNING: [IP_Flow 19-3374] An attempt to modify the value of disabled parameter 'MMCM_DIVCLK_DIVIDE' from '1' to '5' has been ignored for IP 'clk_wiz'
    WARNING: [IP_Flow 19-3374] An attempt to modify the value of disabled parameter 'MMCM_CLKFBOUT_MULT_F' from '12.000' to '32.000' has been ignored for IP 'clk_wiz'
    WARNING: [IP_Flow 19-3374] An attempt to modify the value of disabled parameter 'MMCM_CLKIN1_PERIOD' from '10.000' to '5.333' has been ignored for IP 'clk_wiz'
    WARNING: [IP_Flow 19-3374] An attempt to modify the value of disabled parameter 'MMCM_CLKIN2_PERIOD' from '10.000' to '10.0' has been ignored for IP 'clk_wiz'
    Slave segment '/ZYNQ/zynq_ultra_ps_e_0/SAXIGP2/HP0_DDR_LOW' is being assigned into address space '/CAPTURE_PIPLINE/v_frmbuf_wr_0/Data_m_axi_mm_video' at <0x0000_0000 [ 2G ]>.
    Slave segment '/ZYNQ/zynq_ultra_ps_e_0/SAXIGP2/HP0_DDR_LOW' is being assigned into address space '/LIVE_VIDEO_DP/v_frmbuf_rd_0/Data_m_axi_mm_video' at <0x0000_0000 [ 2G ]>.
    Slave segment '/LIVE_VIDEO_DP/alpha_control_0/S00_AXI/S00_AXI_reg' is being assigned into address space '/ZYNQ/zynq_ultra_ps_e_0/Data' at <0xA001_1000 [ 4K ]>.
    Slave segment '/GPIO/axi_gpio_0/S_AXI/Reg' is being assigned into address space '/ZYNQ/zynq_ultra_ps_e_0/Data' at <0xA004_0000 [ 4K ]>.
    Slave segment '/CAPTURE_PIPLINE/mipi_csi2_rx_subsyst_0/csirxss_s_axi/Reg' is being assigned into address space '/ZYNQ/zynq_ultra_ps_e_0/Data' at <0xA002_0000 [ 128K ]>.
    Slave segment '/LIVE_VIDEO_DP/v_frmbuf_rd_0/s_axi_CTRL/Reg' is being assigned into address space '/ZYNQ/zynq_ultra_ps_e_0/Data' at <0xA00C_0000 [ 64K ]>.
    Slave segment '/CAPTURE_PIPLINE/v_frmbuf_wr_0/s_axi_CTRL/Reg' is being assigned into address space '/ZYNQ/zynq_ultra_ps_e_0/Data' at <0xA000_0000 [ 64K ]>.
    Slave segment '/LIVE_VIDEO_DP/v_osd_0/ctrl/Reg' is being assigned into address space '/ZYNQ/zynq_ultra_ps_e_0/Data' at <0xA007_0000 [ 64K ]>.
    Slave segment '/CAPTURE_PIPLINE/v_proc_ss_0/s_axi_ctrl/Reg' is being assigned into address space '/ZYNQ/zynq_ultra_ps_e_0/Data' at <0xA008_0000 [ 256K ]>.
    Slave segment '/LIVE_VIDEO_DP/v_tc_0/ctrl/Reg' is being assigned into address space '/ZYNQ/zynq_ultra_ps_e_0/Data' at <0xA006_0000 [ 64K ]>.
    Slave segment '/LIVE_VIDEO_DP/v_tpg_0/s_axi_CTRL/Reg' is being assigned into address space '/ZYNQ/zynq_ultra_ps_e_0/Data' at <0xA005_0000 [ 64K ]>.
    
    
    ***** General Configuration for Design...
    
    
    ***** Adding Source Files to Block Design...
    INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI
    WARNING: [BD 41-721] Attempt to set value '0' on disabled parameter 'HAS_LOCK' of cell '/m00_exit_pipeline/m00_exit' is ignored
    WARNING: [BD 41-721] Attempt to set value '0' on disabled parameter 'HAS_LOCK' of cell '/m01_exit_pipeline/m01_exit' is ignored
    WARNING: [BD 41-721] Attempt to set value '0' on disabled parameter 'HAS_LOCK' of cell '/m02_exit_pipeline/m02_exit' is ignored
    INFO: [PSU-1]  DP_AUDIO clock source: RPLL is also being used by other peripheral clocks. Their outputs may get impacted if any driver changes DP_AUDIO PLL source to support runtime audio change 
    INFO: [PSU-1]  DP_AUDIO clock source: RPLL is also being used by other peripheral clocks. Their outputs may get impacted if any driver changes DP_AUDIO PLL source to support runtime audio change 
    INFO: [PSU-1]  DP_AUDIO clock source: RPLL is also being used by other peripheral clocks. Their outputs may get impacted if any driver changes DP_AUDIO PLL source to support runtime audio change 
    INFO: [xilinx.com:ip:v_axi4s_vid_out:4.0-913] /LIVE_VIDEO_DP/v_axi4s_vid_out_0 C_S_AXIS_VIDEO_FORMAT has been set to manual on the GUI. It will not be updated during validation with a propagated value.
    INFO: [xilinx.com:ip:v_axi4s_vid_out:4.0-913] /LIVE_VIDEO_DP/v_axi4s_vid_out_0 C_S_AXIS_VIDEO_FORMAT has been set to manual on the GUI. It will not be updated during validation with a propagated value.
    INFO: [xilinx.com:ip:clk_wiz:6.0-1] /clk_wiz clk_wiz propagate
    INFO: [xilinx.com:ip:clk_wiz:6.0-1] /clk_wiz clk_wiz propagate
    WARNING: [BD 41-237] Bus Interface property AWUSER_WIDTH does not match between /ZYNQ/zynq_ultra_ps_e_0/S_AXI_HP0_FPD(1) and /ZYNQ/axi_mem_intercon/xbar/M00_AXI(0)
    WARNING: [BD 41-237] Bus Interface property ARUSER_WIDTH does not match between /ZYNQ/zynq_ultra_ps_e_0/S_AXI_HP0_FPD(1) and /ZYNQ/axi_mem_intercon/xbar/M00_AXI(0)
    WARNING: [BD 41-237] Bus Interface property AWUSER_WIDTH does not match between /ZYNQ/ps8_0_axi_periph/s00_couplers/auto_ds/S_AXI(0) and /ZYNQ/ps8_0_axi_periph/s00_couplers/auto_cc/M_AXI(16)
    WARNING: [BD 41-237] Bus Interface property ARUSER_WIDTH does not match between /ZYNQ/ps8_0_axi_periph/s00_couplers/auto_ds/S_AXI(0) and /ZYNQ/ps8_0_axi_periph/s00_couplers/auto_cc/M_AXI(16)
    Wrote  : </home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ULTRA96V2.bd> 
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/xbar/m_axi_rid'(2) to pin: '/ZYNQ/axi_mem_intercon/m00_couplers/S_AXI_rid'(6) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/xbar/m_axi_bid'(2) to pin: '/ZYNQ/axi_mem_intercon/m00_couplers/S_AXI_bid'(6) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s00_mmu/s_axi_arlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S00_AXI_arlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s00_mmu/s_axi_awlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S00_AXI_awlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s03_mmu/s_axi_arlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S03_AXI_arlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s03_mmu/s_axi_awlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S03_AXI_awlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/zynq_ultra_ps_e_0/saxigp2_awid'(6) to pin: '/ZYNQ/axi_mem_intercon/M00_AXI_awid'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/zynq_ultra_ps_e_0/saxigp2_arid'(6) to pin: '/ZYNQ/axi_mem_intercon/M00_AXI_arid'(2) - Only lower order bits will be connected.
    VHDL Output written to : /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/synth/ULTRA96V2.v
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/xbar/m_axi_rid'(2) to pin: '/ZYNQ/axi_mem_intercon/m00_couplers/S_AXI_rid'(6) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/xbar/m_axi_bid'(2) to pin: '/ZYNQ/axi_mem_intercon/m00_couplers/S_AXI_bid'(6) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s00_mmu/s_axi_arlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S00_AXI_arlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s00_mmu/s_axi_awlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S00_AXI_awlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s03_mmu/s_axi_arlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S03_AXI_arlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s03_mmu/s_axi_awlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S03_AXI_awlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/zynq_ultra_ps_e_0/saxigp2_awid'(6) to pin: '/ZYNQ/axi_mem_intercon/M00_AXI_awid'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/zynq_ultra_ps_e_0/saxigp2_arid'(6) to pin: '/ZYNQ/axi_mem_intercon/M00_AXI_arid'(2) - Only lower order bits will be connected.
    VHDL Output written to : /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/sim/ULTRA96V2.v
    VHDL Output written to : /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/hdl/ULTRA96V2_wrapper.v
    make_wrapper: Time (s): cpu = 00:00:26 ; elapsed = 00:00:28 . Memory (MB): peak = 3261.922 ; gain = 84.152 ; free physical = 2343 ; free virtual = 7008
    
    
    ***** Adding Vitis Directves to Design...
    update_compile_order: Time (s): cpu = 00:00:04 ; elapsed = 00:00:05 . Memory (MB): peak = 3269.949 ; gain = 8.027 ; free physical = 2335 ; free virtual = 7009
    INFO: [filemgmt 20-334] All file(s) are already imported in fileset: 'constrs_1'
    INFO: [filemgmt 20-348] Importing the appropriate files for fileset: 'constrs_1'
    INFO: [filemgmt 20-334] All file(s) are already imported in fileset: 'sources_1'
    INFO: [filemgmt 20-348] Importing the appropriate files for fileset: 'sources_1'
    
    
    ***** Building Binary...
    Wrote  : </home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ULTRA96V2.bd> 
    INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI
    WARNING: [BD 41-721] Attempt to set value '0' on disabled parameter 'HAS_LOCK' of cell '/m00_exit_pipeline/m00_exit' is ignored
    WARNING: [BD 41-721] Attempt to set value '0' on disabled parameter 'HAS_LOCK' of cell '/m01_exit_pipeline/m01_exit' is ignored
    WARNING: [BD 41-721] Attempt to set value '0' on disabled parameter 'HAS_LOCK' of cell '/m02_exit_pipeline/m02_exit' is ignored
    INFO: [xilinx.com:ip:v_axi4s_vid_out:4.0-913] /LIVE_VIDEO_DP/v_axi4s_vid_out_0 C_S_AXIS_VIDEO_FORMAT has been set to manual on the GUI. It will not be updated during validation with a propagated value.
    INFO: [xilinx.com:ip:v_axi4s_vid_out:4.0-913] /LIVE_VIDEO_DP/v_axi4s_vid_out_0 C_S_AXIS_VIDEO_FORMAT has been set to manual on the GUI. It will not be updated during validation with a propagated value.
    INFO: [xilinx.com:ip:clk_wiz:6.0-1] /clk_wiz clk_wiz propagate
    INFO: [xilinx.com:ip:clk_wiz:6.0-1] /clk_wiz clk_wiz propagate
    WARNING: [BD 41-237] Bus Interface property AWUSER_WIDTH does not match between /ZYNQ/zynq_ultra_ps_e_0/S_AXI_HP0_FPD(1) and /ZYNQ/axi_mem_intercon/xbar/M00_AXI(0)
    WARNING: [BD 41-237] Bus Interface property ARUSER_WIDTH does not match between /ZYNQ/zynq_ultra_ps_e_0/S_AXI_HP0_FPD(1) and /ZYNQ/axi_mem_intercon/xbar/M00_AXI(0)
    WARNING: [BD 41-237] Bus Interface property AWUSER_WIDTH does not match between /ZYNQ/ps8_0_axi_periph/s00_couplers/auto_ds/S_AXI(0) and /ZYNQ/ps8_0_axi_periph/s00_couplers/auto_cc/M_AXI(16)
    WARNING: [BD 41-237] Bus Interface property ARUSER_WIDTH does not match between /ZYNQ/ps8_0_axi_periph/s00_couplers/auto_ds/S_AXI(0) and /ZYNQ/ps8_0_axi_periph/s00_couplers/auto_cc/M_AXI(16)
    Wrote  : </home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ULTRA96V2.bd> 
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/xbar/m_axi_rid'(2) to pin: '/ZYNQ/axi_mem_intercon/m00_couplers/S_AXI_rid'(6) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/xbar/m_axi_bid'(2) to pin: '/ZYNQ/axi_mem_intercon/m00_couplers/S_AXI_bid'(6) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s00_mmu/s_axi_arlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S00_AXI_arlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s00_mmu/s_axi_awlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S00_AXI_awlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s03_mmu/s_axi_arlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S03_AXI_arlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s03_mmu/s_axi_awlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S03_AXI_awlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/zynq_ultra_ps_e_0/saxigp2_awid'(6) to pin: '/ZYNQ/axi_mem_intercon/M00_AXI_awid'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/zynq_ultra_ps_e_0/saxigp2_arid'(6) to pin: '/ZYNQ/axi_mem_intercon/M00_AXI_arid'(2) - Only lower order bits will be connected.
    VHDL Output written to : /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/synth/ULTRA96V2.v
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/xbar/m_axi_rid'(2) to pin: '/ZYNQ/axi_mem_intercon/m00_couplers/S_AXI_rid'(6) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/xbar/m_axi_bid'(2) to pin: '/ZYNQ/axi_mem_intercon/m00_couplers/S_AXI_bid'(6) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s00_mmu/s_axi_arlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S00_AXI_arlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s00_mmu/s_axi_awlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S00_AXI_awlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s03_mmu/s_axi_arlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S03_AXI_arlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/axi_mem_intercon/s03_mmu/s_axi_awlock'(1) to pin: '/ZYNQ/axi_mem_intercon/S03_AXI_awlock'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/zynq_ultra_ps_e_0/saxigp2_awid'(6) to pin: '/ZYNQ/axi_mem_intercon/M00_AXI_awid'(2) - Only lower order bits will be connected.
    WARNING: [BD 41-2384] Width mismatch when connecting pin: '/ZYNQ/zynq_ultra_ps_e_0/saxigp2_arid'(6) to pin: '/ZYNQ/axi_mem_intercon/M00_AXI_arid'(2) - Only lower order bits will be connected.
    VHDL Output written to : /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/sim/ULTRA96V2.v
    VHDL Output written to : /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/hdl/ULTRA96V2_wrapper.v
    INFO: [BD 41-1029] Generation completed for the IP Integrator block CAPTURE_PIPLINE/axis_subset_converter_1 .
    Exporting to file /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ip/ULTRA96V2_mipi_csi2_rx_subsyst_0_0/bd_0/hw_handoff/ULTRA96V2_mipi_csi2_rx_subsyst_0_0.hwh
    Generated Block Design Tcl file /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ip/ULTRA96V2_mipi_csi2_rx_subsyst_0_0/bd_0/hw_handoff/ULTRA96V2_mipi_csi2_rx_subsyst_0_0_bd.tcl
    Generated Hardware Definition File /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ip/ULTRA96V2_mipi_csi2_rx_subsyst_0_0/bd_0/synth/ULTRA96V2_mipi_csi2_rx_subsyst_0_0.hwdef
    INFO: [BD 41-1029] Generation completed for the IP Integrator block CAPTURE_PIPLINE/mipi_csi2_rx_subsyst_0 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block CAPTURE_PIPLINE/proc_sys_reset_1 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block CAPTURE_PIPLINE/proc_sys_reset_2 .
    WARNING: [IP_Flow 19-1971] File named "sim/ULTRA96V2_v_frmbuf_wr_0_0.v" already exists in file group "xilinx_verilogsimulationwrapper", cannot add it again.
    INFO: [BD 41-1029] Generation completed for the IP Integrator block CAPTURE_PIPLINE/v_frmbuf_wr_0 .
    Exporting to file /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ip/ULTRA96V2_v_proc_ss_0_0/bd_1/hw_handoff/bd_793d_smartconnect_0_0.hwh
    Generated Block Design Tcl file /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ip/ULTRA96V2_v_proc_ss_0_0/bd_1/hw_handoff/bd_793d_smartconnect_0_0_bd.tcl
    Generated Hardware Definition File /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ip/ULTRA96V2_v_proc_ss_0_0/bd_1/synth/bd_793d_smartconnect_0_0.hwdef
    WARNING: [IP_Flow 19-1971] File named "sim/bd_793d_vsc_0.v" already exists in file group "xilinx_verilogsimulationwrapper", cannot add it again.
    WARNING: [IP_Flow 19-1971] File named "sim/bd_793d_hsc_0.v" already exists in file group "xilinx_verilogsimulationwrapper", cannot add it again.
    Exporting to file /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ip/ULTRA96V2_v_proc_ss_0_0/bd_0/hw_handoff/ULTRA96V2_v_proc_ss_0_0.hwh
    Generated Block Design Tcl file /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ip/ULTRA96V2_v_proc_ss_0_0/bd_0/hw_handoff/ULTRA96V2_v_proc_ss_0_0_bd.tcl
    Generated Hardware Definition File /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ip/ULTRA96V2_v_proc_ss_0_0/bd_0/synth/ULTRA96V2_v_proc_ss_0_0.hwdef
    INFO: [BD 41-1029] Generation completed for the IP Integrator block CAPTURE_PIPLINE/v_proc_ss_0 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block GPIO/axi_gpio_0 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block GPIO/xlslice_0 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block GPIO/xlslice_1 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block GPIO/xlslice_2 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block GPIO/xlslice_3 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block GPIO/xlslice_4 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block GPIO/xlslice_5 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block LIVE_VIDEO_DP/Subset_0 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block LIVE_VIDEO_DP/alpha_control_0 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block LIVE_VIDEO_DP/axis_subset_converter_0 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block LIVE_VIDEO_DP/axis_subset_converter_2 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block LIVE_VIDEO_DP/proc_sys_reset_0 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block LIVE_VIDEO_DP/proc_sys_reset_2 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block LIVE_VIDEO_DP/v_axi4s_vid_out_0 .
    WARNING: [IP_Flow 19-1971] File named "sim/ULTRA96V2_v_frmbuf_rd_0_0.v" already exists in file group "xilinx_verilogsimulationwrapper", cannot add it again.
    INFO: [BD 41-1029] Generation completed for the IP Integrator block LIVE_VIDEO_DP/v_frmbuf_rd_0 .
    WARNING: [IP_Flow 19-650] IP license key 'v_osd@2013.03' is enabled with a Design_Linking license.
    WARNING: [IP_Flow 19-650] IP license key 'v_osd@2013.03' is enabled with a Design_Linking license.
    INFO: [BD 41-1029] Generation completed for the IP Integrator block LIVE_VIDEO_DP/v_osd_0 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block LIVE_VIDEO_DP/v_tc_0 .
    WARNING: [IP_Flow 19-1971] File named "sim/ULTRA96V2_v_tpg_0_0.v" already exists in file group "xilinx_verilogsimulationwrapper", cannot add it again.
    INFO: [BD 41-1029] Generation completed for the IP Integrator block LIVE_VIDEO_DP/v_tpg_0 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block LIVE_VIDEO_DP/xlconstant_0 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block LIVE_VIDEO_DP/xlconstant_1 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block ZYNQ/axi_mem_intercon/xbar .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block ZYNQ/ps8_0_axi_periph/xbar .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block ZYNQ/rst_clk_wiz_100M .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block ZYNQ/rst_ps8_0_100M .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block ZYNQ/xlconcat_0 .
    INFO: [xilinx.com:ip:zynq_ultra_ps_e:3.3-0] ULTRA96V2_zynq_ultra_ps_e_0_0: 
    Changes in your design (including the PCW configuration settings) are not automatically exported from Vivado to Xilinx's SDK, Petalinux or Yocto.
    This is by design to avoid disrupting existing embedded development efforts. To have any changes of your design taking effect in the embedded software flow please export your
    design by going through Vivado's main menu, click on File, then Export finally select Export Hardware, please ensure you click on the Include BitStream option.
    The auto-generated HDF file is all you need to import in Xilinx's SDK, Petalinux or Yocto for your changes to be reflected in the Embedded Software Flow.
    For more information, please consult PG201, section: Exporting PCW Settings to Embedded Software Flows
    INFO: [PSU-0] Address Range of DDR (0x7ff00000 to 0x7fffffff) is reserved by PMU for internal purpose.
    WARNING: [IP_Flow 19-5611] Unable to find an associated reset port for the interface 'M_AXI_HPM0_FPD'. A default connection has been created.
    WARNING: [IP_Flow 19-5611] Unable to find an associated reset port for the interface 'S_AXI_HP0_FPD'. A default connection has been created.
    INFO: [BD 41-1029] Generation completed for the IP Integrator block ZYNQ/zynq_ultra_ps_e_0 .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block clk_wiz .
    WARNING: [IP_Flow 19-4994] Overwriting existing constraint file '/home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ip/ULTRA96V2_auto_us_0/ULTRA96V2_auto_us_0_ooc.xdc'
    WARNING: [IP_Flow 19-5611] Unable to find an associated reset port for the interface 'S_AXI'. A default connection has been created.
    WARNING: [IP_Flow 19-5611] Unable to find an associated reset port for the interface 'M_AXI'. A default connection has been created.
    INFO: [BD 41-1029] Generation completed for the IP Integrator block ZYNQ/axi_mem_intercon/s03_couplers/auto_us .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block ZYNQ/axi_mem_intercon/s00_mmu .
    INFO: [BD 41-1029] Generation completed for the IP Integrator block ZYNQ/axi_mem_intercon/s03_mmu .
    WARNING: [IP_Flow 19-4994] Overwriting existing constraint file '/home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ip/ULTRA96V2_auto_cc_0/ULTRA96V2_auto_cc_0_ooc.xdc'
    WARNING: [IP_Flow 19-5611] Unable to find an associated reset port for the interface 'S_AXI'. A default connection has been created.
    WARNING: [IP_Flow 19-5611] Unable to find an associated reset port for the interface 'M_AXI'. A default connection has been created.
    INFO: [BD 41-1029] Generation completed for the IP Integrator block ZYNQ/ps8_0_axi_periph/s00_couplers/auto_cc .
    WARNING: [IP_Flow 19-4994] Overwriting existing constraint file '/home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ip/ULTRA96V2_auto_ds_0/ULTRA96V2_auto_ds_0_ooc.xdc'
    WARNING: [IP_Flow 19-5611] Unable to find an associated reset port for the interface 'S_AXI'. A default connection has been created.
    WARNING: [IP_Flow 19-5611] Unable to find an associated reset port for the interface 'M_AXI'. A default connection has been created.
    INFO: [BD 41-1029] Generation completed for the IP Integrator block ZYNQ/ps8_0_axi_periph/s00_couplers/auto_ds .
    WARNING: [IP_Flow 19-4994] Overwriting existing constraint file '/home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ip/ULTRA96V2_auto_pc_0/ULTRA96V2_auto_pc_0_ooc.xdc'
    INFO: [BD 41-1029] Generation completed for the IP Integrator block ZYNQ/ps8_0_axi_periph/s00_couplers/auto_pc .
    Exporting to file /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/hw_handoff/ULTRA96V2.hwh
    Generated Block Design Tcl file /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/hw_handoff/ULTRA96V2_bd.tcl
    Generated Hardware Definition File /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/synth/ULTRA96V2.hwdef
    [Wed Mar 17 00:12:00 2021] Launched bd_793d_hsc_0_synth_1, ULTRA96V2_mipi_csi2_rx_subsyst_0_0_synth_1, bd_793d_rst_axis_0_synth_1, ULTRA96V2_axis_subset_converter_1_0_synth_1, bd_793d_input_size_set_0_synth_1, bd_793d_reset_sel_axis_0_synth_1, ULTRA96V2_proc_sys_reset_2_0_synth_1, ULTRA96V2_v_proc_ss_0_0_synth_1, ULTRA96V2_v_frmbuf_wr_0_0_synth_1, bd_793d_smartconnect_0_0_synth_1, bd_1b41_rx_0_synth_1, bd_1b41_r_sync_0_synth_1, bd_793d_axis_register_slice_0_0_synth_1, bd_793d_vsc_0_synth_1, bd_1b41_xbar_0_synth_1, bd_1b41_phy_0_synth_1, bd_793d_axis_fifo_0_synth_1, ULTRA96V2_proc_sys_reset_1_0_synth_1, bd_1b41_vfb_0_0_synth_1, ULTRA96V2_axi_gpio_0_0_synth_1, ULTRA96V2_Subset_0_0_synth_1, ULTRA96V2_alpha_control_0_0_synth_1, ULTRA96V2_axis_subset_converter_0_0_synth_1, ULTRA96V2_axis_subset_converter_2_0_synth_1, ULTRA96V2_proc_sys_reset_0_0_synth_1, ULTRA96V2_proc_sys_reset_2_1_synth_1, ULTRA96V2_v_axi4s_vid_out_0_0_synth_1, ULTRA96V2_v_frmbuf_rd_0_0_synth_1, ULTRA96V2_v_osd_0_0_synth_1, ULTRA96V2_v_tc_0_0_synth_1, ULTRA96V2_v_tpg_0_0_synth_1, ULTRA96V2_clk_wiz_0_synth_1, ULTRA96V2_auto_us_0_synth_1, ULTRA96V2_s00_mmu_0_synth_1, ULTRA96V2_s03_mmu_0_synth_1, ULTRA96V2_auto_cc_0_synth_1, ULTRA96V2_auto_ds_0_synth_1, ULTRA96V2_auto_pc_0_synth_1, ULTRA96V2_xbar_0_synth_1, ULTRA96V2_xbar_1_synth_1, ULTRA96V2_rst_clk_wiz_100M_0_synth_1, ULTRA96V2_rst_ps8_0_100M_0_synth_1, ULTRA96V2_zynq_ultra_ps_e_0_0_synth_1, synth_1...
    Run output will be captured here:
    bd_793d_hsc_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/bd_793d_hsc_0_synth_1/runme.log
    ULTRA96V2_mipi_csi2_rx_subsyst_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_mipi_csi2_rx_subsyst_0_0_synth_1/runme.log
    bd_793d_rst_axis_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/bd_793d_rst_axis_0_synth_1/runme.log
    ULTRA96V2_axis_subset_converter_1_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_axis_subset_converter_1_0_synth_1/runme.log
    bd_793d_input_size_set_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/bd_793d_input_size_set_0_synth_1/runme.log
    bd_793d_reset_sel_axis_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/bd_793d_reset_sel_axis_0_synth_1/runme.log
    ULTRA96V2_proc_sys_reset_2_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_proc_sys_reset_2_0_synth_1/runme.log
    ULTRA96V2_v_proc_ss_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_v_proc_ss_0_0_synth_1/runme.log
    ULTRA96V2_v_frmbuf_wr_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_v_frmbuf_wr_0_0_synth_1/runme.log
    bd_793d_smartconnect_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/bd_793d_smartconnect_0_0_synth_1/runme.log
    bd_1b41_rx_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/bd_1b41_rx_0_synth_1/runme.log
    bd_1b41_r_sync_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/bd_1b41_r_sync_0_synth_1/runme.log
    bd_793d_axis_register_slice_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/bd_793d_axis_register_slice_0_0_synth_1/runme.log
    bd_793d_vsc_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/bd_793d_vsc_0_synth_1/runme.log
    bd_1b41_xbar_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/bd_1b41_xbar_0_synth_1/runme.log
    bd_1b41_phy_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/bd_1b41_phy_0_synth_1/runme.log
    bd_793d_axis_fifo_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/bd_793d_axis_fifo_0_synth_1/runme.log
    ULTRA96V2_proc_sys_reset_1_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_proc_sys_reset_1_0_synth_1/runme.log
    bd_1b41_vfb_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/bd_1b41_vfb_0_0_synth_1/runme.log
    ULTRA96V2_axi_gpio_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_axi_gpio_0_0_synth_1/runme.log
    ULTRA96V2_Subset_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_Subset_0_0_synth_1/runme.log
    ULTRA96V2_alpha_control_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_alpha_control_0_0_synth_1/runme.log
    ULTRA96V2_axis_subset_converter_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_axis_subset_converter_0_0_synth_1/runme.log
    ULTRA96V2_axis_subset_converter_2_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_axis_subset_converter_2_0_synth_1/runme.log
    ULTRA96V2_proc_sys_reset_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_proc_sys_reset_0_0_synth_1/runme.log
    ULTRA96V2_proc_sys_reset_2_1_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_proc_sys_reset_2_1_synth_1/runme.log
    ULTRA96V2_v_axi4s_vid_out_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_v_axi4s_vid_out_0_0_synth_1/runme.log
    ULTRA96V2_v_frmbuf_rd_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_v_frmbuf_rd_0_0_synth_1/runme.log
    ULTRA96V2_v_osd_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_v_osd_0_0_synth_1/runme.log
    ULTRA96V2_v_tc_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_v_tc_0_0_synth_1/runme.log
    ULTRA96V2_v_tpg_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_v_tpg_0_0_synth_1/runme.log
    ULTRA96V2_clk_wiz_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_clk_wiz_0_synth_1/runme.log
    ULTRA96V2_auto_us_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_auto_us_0_synth_1/runme.log
    ULTRA96V2_s00_mmu_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_s00_mmu_0_synth_1/runme.log
    ULTRA96V2_s03_mmu_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_s03_mmu_0_synth_1/runme.log
    ULTRA96V2_auto_cc_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_auto_cc_0_synth_1/runme.log
    ULTRA96V2_auto_ds_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_auto_ds_0_synth_1/runme.log
    ULTRA96V2_auto_pc_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_auto_pc_0_synth_1/runme.log
    ULTRA96V2_xbar_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_xbar_0_synth_1/runme.log
    ULTRA96V2_xbar_1_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_xbar_1_synth_1/runme.log
    ULTRA96V2_rst_clk_wiz_100M_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_rst_clk_wiz_100M_0_synth_1/runme.log
    ULTRA96V2_rst_ps8_0_100M_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_rst_ps8_0_100M_0_synth_1/runme.log
    ULTRA96V2_zynq_ultra_ps_e_0_0_synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/ULTRA96V2_zynq_ultra_ps_e_0_0_synth_1/runme.log
    synth_1: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/synth_1/runme.log
    [Wed Mar 17 00:12:01 2021] Launched impl_1...
    Run output will be captured here: /home/vitis20201/develop/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.runs/impl_1/runme.log
    launch_runs: Time (s): cpu = 00:01:41 ; elapsed = 00:01:55 . Memory (MB): peak = 3842.887 ; gain = 572.938 ; free physical = 2188 ; free virtual = 6962
    
    
    ***** ...
    [Wed Mar 17 00:12:01 2021] Waiting for impl_1 to finish...
    /tools/Xilinx/Vivado/2020.1/bin/loader: line 286:  2934 Killed                  "$RDI_PROG" "$@"
    vitis20201@vitis20201-VirtualBox:~/develop/git/avnet/petalinux$  
    
    

     

     

    cd ~/develop/git/avnet/petalinux/projects/ultra96v2_dualcam_2020_1
    
    
    cp ./images/linux/BOOT.BIN /media/vitis20201/boot/.
    ls /media/vitis20201/boot/
    cp ./images/linux/boot.scr /media/vitis20201/boot/.
    cp ./images/linux/image.ub /media/vitis20201/boot/.
    ls /media/vitis20201/root/
    sudo rm -rf /media/vitis20201/root/*
    sudo tar xvf ./images/linux/rootfs.tar.gz -C /media/vitis20201/root/
    sync
    sunc
    

     

      • Insert the uSD card with the PetaLinux image on it into the Ultra96-V2, connect the USB-to-JTAG/UART Pod to the Ubuntu VM and start GtkTerm to connect to the board via serial interface.
      • Boot the Ultra96-V2 and oberserve the boot sequence from the GtkTerm.

     

    Xilinx Zynq MP First Stage Boot Loader 
    
    
    Release 2020.1   Mar 18 2021  -  03:19:16
    NOTICE:  ATF running on XCZU3EG/silicon v4/RTL5.1 at 0xfffea000
    NOTICE:  BL31: v2.2(release):v1.1-5588-g5918e656e
    NOTICE:  BL31: Built : 03:16:38, Mar 18 2021
    
    
    
    
    U-Boot 2020.01 (Mar 18 2021 - 03:12:17 +0000)
    
    
    Model: Avnet Ultra96 Rev1
    Board: Xilinx ZynqMP
    DRAM:  2 GiB
    PMUFW: v1.1
    EL Level: EL2
    Chip ID: zu3eg
    NAND:  0 MiB
    MMC:   mmc@ff160000: 0, mmc@ff170000: 1
    In:    serial@ff010000
    Out:   serial@ff010000
    Err:   serial@ff010000
    Bootmode: SD_MODE
    Reset reason: EXTERNAL 
    Net:   No ethernet found.
    Hit any key to stop autoboot:  2     1     0 
    switch to partitions #0, OK
    mmc0 is current device
    Scanning mmc 0:1...
    Found U-Boot script /boot.scr
    2007 bytes read in 22 ms (88.9 KiB/s)
    ## Executing script at 20000000
    8282228 bytes read in 619 ms (12.8 MiB/s)
    ## Loading kernel from FIT Image at 10000000 ...
       Using 'conf@system-top.dtb' configuration
       Trying 'kernel@1' kernel subimage
         Description:  Linux kernel
         Type:         Kernel Image
         Compression:  gzip compressed
         Data Start:   0x100000f4
         Data Size:    8221988 Bytes = 7.8 MiB
         Architecture: AArch64
         OS:           Linux
         Load Address: 0x00080000
         Entry Point:  0x00080000
         Hash algo:    sha256
         Hash value:   4f4d17cfb2796ebaabbe96dd11f5dc02b30d790e90b4b9119696c4955ae07851
       Verifying Hash Integrity ... sha256+ OK
    ## Loading fdt from FIT Image at 10000000 ...
       Using 'conf@system-top.dtb' configuration
       Trying 'fdt@system-top.dtb' fdt subimage
         Description:  Flattened Device Tree blob
         Type:         Flat Device Tree
         Compression:  uncompressed
         Data Start:   0x107d7728
         Data Size:    58338 Bytes = 57 KiB
         Architecture: AArch64
         Hash algo:    sha256
         Hash value:   a9c5e821e526fb902f204d1c089b9db8777b1aca7673bbd939f7846adb52f206
       Verifying Hash Integrity ... sha256+ OK
       Booting using the fdt blob at 0x107d7728
       Uncompressing Kernel Image
       Loading Device Tree to 000000000ffee000, end 000000000ffff3e1 ... OK
    
    
    Starting kernel ...
    
    
    [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
    [    0.000000] Linux version 5.4.0-xilinx-v2020.1 (oe-user@oe-host) (gcc version 9.2.0 (GCC)) #1 SMP Thu Mar 18 01:32:42 UTC 2021
    [    0.000000] Machine model: Avnet Ultra96 Rev1
    [    0.000000] earlycon: cdns0 at MMIO 0x00000000ff010000 (options '115200n8')
    [    0.000000] printk: bootconsole [cdns0] enabled
    [    0.000000] efi: Getting EFI parameters from FDT:
    [    0.000000] efi: UEFI not found.
    [    0.000000] cma: Reserved 512 MiB at 0x000000005fc00000
    [    0.000000] psci: probing for conduit method from DT.
    [    0.000000] psci: PSCIv1.1 detected in firmware.
    [    0.000000] psci: Using standard PSCI v0.2 function IDs
    [    0.000000] psci: MIGRATE_INFO_TYPE not supported.
    [    0.000000] psci: SMC Calling Convention v1.1
    [    0.000000] percpu: Embedded 21 pages/cpu s48664 r8192 d29160 u86016
    [    0.000000] Detected VIPT I-cache on CPU0
    [    0.000000] CPU features: detected: ARM erratum 845719
    [    0.000000] Speculative Store Bypass Disable mitigation not required
    [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 515516
    [    0.000000] Kernel command line: earlycon console=ttyPS0,115200 clk_ignore_unused root=/dev/mmcblk0p2 rw rootwait cma=512M
    [    0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
    [    0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
    [    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
    [    0.000000] Memory: 1512560K/2094816K available (11772K kernel code, 686K rwdata, 3656K rodata, 704K init, 516K bss, 57968K reserved, 524288K cma-reserved)
    [    0.000000] rcu: Hierarchical RCU implementation.
    [    0.000000] rcu: RCU event tracing is enabled.
    [    0.000000] rcu: RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4.
    [    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
    [    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
    [    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
    [    0.000000] GIC: Adjusting CPU interface base to 0x00000000f902f000
    [    0.000000] GIC: Using split EOI/Deactivate mode
    [    0.000000] random: get_random_bytes called from start_kernel+0x2a8/0x42c with crng_init=0
    [    0.000000] arch_timer: cp15 timer(s) running at 100.00MHz (phys).
    [    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x171024e7e0, max_idle_ns: 440795205315 ns
    [    0.000004] sched_clock: 56 bits at 100MHz, resolution 10ns, wraps every 4398046511100ns
    [    0.008466] Console: colour dummy device 80x25
    [    0.012486] Calibrating delay loop (skipped), value calculated using timer frequency.. 200.00 BogoMIPS (lpj=400000)
    [    0.022839] pid_max: default: 32768 minimum: 301
    [    0.027606] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
    [    0.034788] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
    [    0.043849] ASID allocator initialised with 32768 entries
    [    0.047995] rcu: Hierarchical SRCU implementation.
    [    0.052931] EFI services will not be available.
    [    0.057350] smp: Bringing up secondary CPUs ...
    [    0.062081] Detected VIPT I-cache on CPU1
    [    0.062126] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
    [    0.062530] Detected VIPT I-cache on CPU2
    [    0.062550] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
    [    0.062908] Detected VIPT I-cache on CPU3
    [    0.062927] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
    [    0.062976] smp: Brought up 1 node, 4 CPUs
    [    0.097141] SMP: Total of 4 processors activated.
    [    0.101814] CPU features: detected: 32-bit EL0 Support
    [    0.106917] CPU features: detected: CRC32 instructions
    [    0.112056] CPU: All CPU(s) started at EL2
    [    0.116098] alternatives: patching kernel code
    [    0.121607] devtmpfs: initialized
    [    0.130055] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
    [    0.134155] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
    [    0.156135] xor: measuring software checksum speed
    [    0.193144]    8regs     :  2375.000 MB/sec
    [    0.233173]    32regs    :  2725.000 MB/sec
    [    0.273207]    arm64_neon:  2365.000 MB/sec
    [    0.273248] xor: using function: 32regs (2725.000 MB/sec)
    [    0.277120] pinctrl core: initialized pinctrl subsystem
    [    0.283225] NET: Registered protocol family 16
    [    0.288248] DMA: preallocated 256 KiB pool for atomic allocations
    [    0.292793] audit: initializing netlink subsys (disabled)
    [    0.298218] audit: type=2000 audit(0.240:1): state=initialized audit_enabled=0 res=1
    [    0.306012] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
    [    0.326829] HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages
    [    0.327885] HugeTLB registered 32.0 MiB page size, pre-allocated 0 pages
    [    0.334554] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
    [    0.341210] HugeTLB registered 64.0 KiB page size, pre-allocated 0 pages
    [    1.422352] DRBG: Continuing without Jitter RNG
    [    1.499172] raid6: neonx8   gen()  1541 MB/s
    [    1.567193] raid6: neonx8   xor()  1461 MB/s
    [    1.635262] raid6: neonx4   gen()  1480 MB/s
    [    1.703291] raid6: neonx4   xor()  1419 MB/s
    [    1.771344] raid6: neonx2   gen()  1123 MB/s
    [    1.839399] raid6: neonx2   xor()  1173 MB/s
    [    1.907523] raid6: neonx1   gen()   728 MB/s
    [    1.975522] raid6: neonx1   xor()   880 MB/s
    [    2.043575] raid6: int64x8  gen()  1162 MB/s
    [    2.111620] raid6: int64x8  xor()   760 MB/s
    [    2.179679] raid6: int64x4  gen()   977 MB/s
    [    2.247716] raid6: int64x4  xor()   733 MB/s
    [    2.315749] raid6: int64x2  gen()   677 MB/s
    [    2.383832] raid6: int64x2  xor()   591 MB/s
    [    2.451880] raid6: int64x1  gen()   449 MB/s
    [    2.519904] raid6: int64x1  xor()   450 MB/s
    [    2.519945] raid6: using algorithm neonx8 gen() 1541 MB/s
    [    2.523898] raid6: .... xor() 1461 MB/s, rmw enabled
    [    2.528829] raid6: using neon recovery algorithm
    [    2.534226] iommu: Default domain type: Translated 
    [    2.538522] SCSI subsystem initialized
    [    2.542147] usbcore: registered new interface driver usbfs
    [    2.547457] usbcore: registered new interface driver hub
    [    2.552731] usbcore: registered new device driver usb
    [    2.557771] mc: Linux media interface: v0.10
    [    2.561976] videodev: Linux video capture interface: v2.00
    [    2.567424] pps_core: LinuxPPS API ver. 1 registered
    [    2.572338] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
    [    2.581432] PTP clock support registered
    [    2.585328] EDAC MC: Ver: 3.0.0
    [    2.588887] zynqmp-ipi-mbox mailbox@ff990400: Registered ZynqMP IPI mbox with TX/RX channels.
    [    2.597157] zynqmp-ipi-mbox mailbox@ff990600: Registered ZynqMP IPI mbox with TX/RX channels.
    [    2.605489] FPGA manager framework
    [    2.608900] Advanced Linux Sound Architecture Driver Initialized.
    [    2.615143] Bluetooth: Core ver 2.22
    [    2.618371] NET: Registered protocol family 31
    [    2.622769] Bluetooth: HCI device and connection manager initialized
    [    2.629087] Bluetooth: HCI socket layer initialized
    [    2.633928] Bluetooth: L2CAP socket layer initialized
    [    2.638951] Bluetooth: SCO socket layer initialized
    [    2.644208] clocksource: Switched to clocksource arch_sys_counter
    [    2.649972] VFS: Disk quotas dquot_6.6.0
    [    2.653790] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
    [    2.664848] NET: Registered protocol family 2
    [    2.665320] tcp_listen_portaddr_hash hash table entries: 1024 (order: 2, 16384 bytes, linear)
    [    2.673414] TCP established hash table entries: 16384 (order: 5, 131072 bytes, linear)
    [    2.681348] TCP bind hash table entries: 16384 (order: 6, 262144 bytes, linear)
    [    2.688845] TCP: Hash tables configured (established 16384 bind 16384)
    [    2.695110] UDP hash table entries: 1024 (order: 3, 32768 bytes, linear)
    [    2.701697] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes, linear)
    [    2.708882] NET: Registered protocol family 1
    [    2.713401] RPC: Registered named UNIX socket transport module.
    [    2.718967] RPC: Registered udp transport module.
    [    2.723630] RPC: Registered tcp transport module.
    [    2.728299] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [    2.734973] PCI: CLS 0 bytes, default 64
    [    2.739171] hw perfevents: no interrupt-affinity property for /pmu, guessing.
    [    2.745867] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available
    [    2.754376] Initialise system trusted keyrings
    [    2.757905] workingset: timestamp_bits=46 max_order=19 bucket_order=0
    [    2.765031] NFS: Registering the id_resolver key type
    [    2.769230] Key type id_resolver registered
    [    2.773366] Key type id_legacy registered
    [    2.777353] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
    [    2.784023] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
    [    2.803847] NET: Registered protocol family 38
    [    2.803893] Key type asymmetric registered
    [    2.806724] Asymmetric key parser 'x509' registered
    [    2.811588] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247)
    [    2.818920] io scheduler mq-deadline registered
    [    2.823417] io scheduler kyber registered
    [    2.828109] GPIO IRQ not connected
    [    2.830773] XGpio: gpio@a0040000: registered, base is 504
    [    2.837897] xilinx-frmbuf a0000000.v_frmbuf_wr: Xilinx AXI frmbuf DMA_DEV_TO_MEM
    [    2.843551] xilinx-frmbuf a0000000.v_frmbuf_wr: Xilinx AXI FrameBuffer Engine Driver Probed!!
    [    2.852075] xilinx-frmbuf a00c0000.v_frmbuf_rd: Xilinx AXI frmbuf DMA_MEM_TO_DEV
    [    2.859366] xilinx-frmbuf a00c0000.v_frmbuf_rd: Xilinx AXI FrameBuffer Engine Driver Probed!!
    [    2.893385] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
    [    2.897849] xlnx,scaler-bridge a0080000.v_proc_ss: Reset GPIO not setup in DT
    [    2.901200] xlnx,scaler-bridge a0080000.v_proc_ss: parse_of failed
    [    2.907358] xlnx,scaler-bridge: probe of a0080000.v_proc_ss failed with error -2
    [    2.915268] cacheinfo: Unable to detect cache hierarchy for CPU 0
    [    2.925662] brd: module loaded
    [    2.931221] loop: module loaded
    [    2.932222] mtdoops: mtd device (mtddev=name/number) must be supplied
    [    2.936488] libphy: Fixed MDIO Bus: probed
    [    2.940229] tun: Universal TUN/TAP device driver, 1.6
    [    2.944314] CAN device driver interface
    [    2.948999] usbcore: registered new interface driver rtl8150
    [    2.953669] usbcore: registered new interface driver r8152
    [    2.959115] usbcore: registered new interface driver asix
    [    2.964479] usbcore: registered new interface driver ax88179_178a
    [    2.970529] usbcore: registered new interface driver cdc_ether
    [    2.976323] usbcore: registered new interface driver net1080
    [    2.981946] usbcore: registered new interface driver cdc_subset
    [    2.987828] usbcore: registered new interface driver zaurus
    [    2.993379] usbcore: registered new interface driver cdc_ncm
    [    2.999894] usbcore: registered new interface driver uas
    [    3.004276] usbcore: registered new interface driver usb-storage
    [    3.010407] gadgetfs: USB Gadget filesystem, version 24 Aug 2004
    [    3.016716] rtc_zynqmp ffa60000.rtc: registered as rtc0
    [    3.021440] i2c /dev entries driver
    [    3.026328] xilinx-tpg a0050000.v_tpg: invalid number of ports 0
    [    3.030804] xilinx-tpg: probe of a0050000.v_tpg failed with error -22
    [    3.037316] xilinx-vtc a0060000.v_tc: device found, version 6.020
    [    3.043323] usbcore: registered new interface driver uvcvideo
    [    3.048965] USB Video Class driver (1.1.1)
    [    3.053700] Bluetooth: HCI UART driver ver 2.3
    [    3.057450] Bluetooth: HCI UART protocol H4 registered
    [    3.062545] Bluetooth: HCI UART protocol BCSP registered
    [    3.067838] Bluetooth: HCI UART protocol LL registered
    [    3.072925] Bluetooth: HCI UART protocol ATH3K registered
    [    3.078299] Bluetooth: HCI UART protocol Three-wire (H5) registered
    [    3.084552] Bluetooth: HCI UART protocol Intel registered
    [    3.089896] Bluetooth: HCI UART protocol QCA registered
    [    3.095094] usbcore: registered new interface driver bcm203x
    [    3.100716] usbcore: registered new interface driver bpa10x
    [    3.106251] usbcore: registered new interface driver bfusb
    [    3.111702] usbcore: registered new interface driver btusb
    [    3.117167] usbcore: registered new interface driver ath3k
    [    3.122694] EDAC MC: ECC not enabled
    [    3.126272] EDAC DEVICE0: Giving out device to module edac controller cache_err: DEV edac (POLLED)
    [    3.135210] EDAC DEVICE1: Giving out device to module zynqmp-ocm-edac controller zynqmp_ocm: DEV ff960000.memory-controller (INTERRUPT)
    [    3.147453] sdhci: Secure Digital Host Controller Interface driver
    [    3.153283] sdhci: Copyright(c) Pierre Ossman
    [    3.157607] sdhci-pltfm: SDHCI platform and OF driver helper
    [    3.163678] ledtrig-cpu: registered to indicate activity on CPUs
    [    3.169249] zynqmp_firmware_probe Platform Management API v1.1
    [    3.174997] zynqmp_firmware_probe Trustzone version v1.0
    [    3.183907] zynqmp-pinctrl firmware:zynqmp-firmware:pinctrl: zynqmp pinctrl initialized
    [    3.212636] alg: No test for xilinx-zynqmp-aes (zynqmp-aes)
    [    3.212912] zynqmp_aes zynqmp_aes: AES Successfully Registered
    [    3.212912] 
    
    
    [    3.220147] alg: No test for xilinx-keccak-384 (zynqmp-keccak-384)
    [    3.226324] alg: No test for xilinx-zynqmp-rsa (zynqmp-rsa)
    [    3.231904] usbcore: registered new interface driver usbhid
    [    3.237139] usbhid: USB HID core driver
    [    3.241178] xlnk xlnk: Major 243
    [    3.244270] xlnk xlnk: xlnk driver loaded
    [    3.248116] xlnk xlnk: xlnk_pdev is not null
    [    3.254858] fpga_manager fpga0: Xilinx ZynqMP FPGA Manager registered
    [    3.259117] usbcore: registered new interface driver snd-usb-audio
    [    3.265905] pktgen: Packet Generator for packet performance testing. Version: 2.75
    [    3.273129] Initializing XFRM netlink socket
    [    3.276764] NET: Registered protocol family 10
    [    3.281603] Segment Routing with IPv6
    [    3.284843] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
    [    3.291001] NET: Registered protocol family 17
    [    3.295018] NET: Registered protocol family 15
    [    3.299435] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.
    [    3.312305] can: controller area network core (rev 20170425 abi 9)
    [    3.318482] NET: Registered protocol family 29
    [    3.322859] can: raw protocol (rev 20170425)
    [    3.327096] can: broadcast manager protocol (rev 20170425 t)
    [    3.332721] can: netlink gateway (rev 20190810) max_hops=1
    [    3.338255] Bluetooth: RFCOMM TTY layer initialized
    [    3.343020] Bluetooth: RFCOMM socket layer initialized
    [    3.348128] Bluetooth: RFCOMM ver 1.11
    [    3.351840] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
    [    3.357110] Bluetooth: BNEP filters: protocol multicast
    [    3.362304] Bluetooth: BNEP socket layer initialized
    [    3.367232] Bluetooth: HIDP (Human Interface Emulation) ver 1.2
    [    3.373115] Bluetooth: HIDP socket layer initialized
    [    3.378198] 9pnet: Installing 9P2000 support
    [    3.382309] Key type dns_resolver registered
    [    3.386871] registered taskstats version 1
    [    3.390593] Loading compiled-in X.509 certificates
    [    3.395838] Btrfs loaded, crc32c=crc32c-generic
    [    3.411061] ff000000.serial: ttyPS1 at MMIO 0xff000000 (irq = 40, base_baud = 6249999) is a xuartps
    [    3.415073] ff010000.serial: ttyPS0 at MMIO 0xff010000 (irq = 41, base_baud = 6249999) is a xuartps
    [    3.429228] printk: console [ttyPS0] enabled
    [    3.429228] printk: console [ttyPS0] enabled
    [    3.433530] printk: bootconsole [cdns0] disabled
    [    3.433530] printk: bootconsole [cdns0] disabled
    [    3.442674] of-fpga-region fpga-full: FPGA Region probed
    [    3.453601] xilinx-dpdma fd4c0000.dma: Xilinx DPDMA engine is probed
    [    3.460214] xilinx-zynqmp-dma fd500000.dma: ZynqMP DMA driver Probe success
    [    3.467328] xilinx-zynqmp-dma fd510000.dma: ZynqMP DMA driver Probe success
    [    3.474447] xilinx-zynqmp-dma fd520000.dma: ZynqMP DMA driver Probe success
    [    3.481562] xilinx-zynqmp-dma fd530000.dma: ZynqMP DMA driver Probe success
    [    3.488683] xilinx-zynqmp-dma fd540000.dma: ZynqMP DMA driver Probe success
    [    3.495798] xilinx-zynqmp-dma fd550000.dma: ZynqMP DMA driver Probe success
    [    3.502921] xilinx-zynqmp-dma fd560000.dma: ZynqMP DMA driver Probe success
    [    3.510034] xilinx-zynqmp-dma fd570000.dma: ZynqMP DMA driver Probe success
    [    3.517229] xilinx-zynqmp-dma ffa80000.dma: ZynqMP DMA driver Probe success
    [    3.524353] xilinx-zynqmp-dma ffa90000.dma: ZynqMP DMA driver Probe success
    [    3.531464] xilinx-zynqmp-dma ffaa0000.dma: ZynqMP DMA driver Probe success
    [    3.538594] xilinx-zynqmp-dma ffab0000.dma: ZynqMP DMA driver Probe success
    [    3.545710] xilinx-zynqmp-dma ffac0000.dma: ZynqMP DMA driver Probe success
    [    3.552830] xilinx-zynqmp-dma ffad0000.dma: ZynqMP DMA driver Probe success
    [    3.559943] xilinx-zynqmp-dma ffae0000.dma: ZynqMP DMA driver Probe success
    [    3.567063] xilinx-zynqmp-dma ffaf0000.dma: ZynqMP DMA driver Probe success
    [    3.574423] xilinx-psgtr fd400000.zynqmp_phy: Lane:1 type:8 protocol:4 pll_locked:yes
    [    3.586162] zynqmp_clk_divider_set_rate() set divider failed for spi1_ref_div1, ret = -13
    [    3.594982] xilinx-dp-snd-codec fd4a0000.zynqmp-display:zynqmp_dp_snd_codec0: Xilinx DisplayPort Sound Codec probed
    [    3.605688] xilinx-dp-snd-pcm zynqmp_dp_snd_pcm0: Xilinx DisplayPort Sound PCM probed
    [    3.613737] xilinx-dp-snd-pcm zynqmp_dp_snd_pcm1: Xilinx DisplayPort Sound PCM probed
    [    3.622321] xilinx-dp-snd-card fd4a0000.zynqmp-display:zynqmp_dp_snd_card: xilinx-dp-snd-codec-dai <-> xilinx-dp-snd-codec-dai mapping ok
    [    3.634869] xilinx-dp-snd-card fd4a0000.zynqmp-display:zynqmp_dp_snd_card: xilinx-dp-snd-codec-dai <-> xilinx-dp-snd-codec-dai mapping ok
    [    3.647588] xilinx-dp-snd-card fd4a0000.zynqmp-display:zynqmp_dp_snd_card: Xilinx DisplayPort Sound Card probed
    [    3.657770] OF: graph: no port node found in /amba/zynqmp-display@fd4a0000
    [    3.664792] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
    [    3.671401] [drm] No driver support for vblank timestamp query.
    [    3.677415] xlnx-drm xlnx-drm.0: bound fd4a0000.zynqmp-display (ops 0xffffffc010cc77f0)
    [    3.886300] Console: switching to colour frame buffer device 240x67
    [    3.905913] zynqmp-display fd4a0000.zynqmp-display: fb0: xlnxdrmfb frame buffer device
    [    3.914168] [drm] Initialized xlnx 1.0.0 20130509 for fd4a0000.zynqmp-display on minor 0
    [    3.922290] zynqmp-display fd4a0000.zynqmp-display: ZynqMP DisplayPort Subsystem driver probed
    [    3.932878] xilinx-axipmon ffa00000.perf-monitor: Probed Xilinx APM
    [    3.939425] xilinx-axipmon fd0b0000.perf-monitor: Probed Xilinx APM
    [    3.945955] xilinx-axipmon fd490000.perf-monitor: Probed Xilinx APM
    [    3.952460] xilinx-axipmon ffa10000.perf-monitor: Probed Xilinx APM
    [    3.959478] dwc3 fe200000.dwc3: Failed to get clk 'ref': -2
    [    3.965284] xilinx-psgtr fd400000.zynqmp_phy: Lane:2 type:0 protocol:3 pll_locked:yes
    [    3.976753] dwc3 fe300000.dwc3: Failed to get clk 'ref': -2
    [    3.982542] xilinx-psgtr fd400000.zynqmp_phy: Lane:3 type:1 protocol:3 pll_locked:yes
    [    3.992786] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    [    3.998284] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
    [    4.006067] xhci-hcd xhci-hcd.0.auto: hcc params 0x0238f625 hci version 0x100 quirks 0x0000000202010010
    [    4.015486] xhci-hcd xhci-hcd.0.auto: irq 55, io mem 0xfe300000
    [    4.021700] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.04
    [    4.029965] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [    4.037180] usb usb1: Product: xHCI Host Controller
    [    4.042054] usb usb1: Manufacturer: Linux 5.4.0-xilinx-v2020.1 xhci-hcd
    [    4.048662] usb usb1: SerialNumber: xhci-hcd.0.auto
    [    4.053864] hub 1-0:1.0: USB hub found
    [    4.057635] hub 1-0:1.0: 1 port detected
    [    4.061753] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    [    4.067248] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
    [    4.074906] xhci-hcd xhci-hcd.0.auto: Host supports USB 3.0 SuperSpeed
    [    4.081487] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
    [    4.089653] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.04
    [    4.097923] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [    4.105146] usb usb2: Product: xHCI Host Controller
    [    4.110019] usb usb2: Manufacturer: Linux 5.4.0-xilinx-v2020.1 xhci-hcd
    [    4.116627] usb usb2: SerialNumber: xhci-hcd.0.auto
    [    4.121746] hub 2-0:1.0: USB hub found
    [    4.125514] hub 2-0:1.0: 1 port detected
    [    4.131321] i2c i2c-0: Added multiplexed i2c bus 2
    [    4.136253] i2c i2c-0: Added multiplexed i2c bus 3
    [    4.141175] i2c i2c-0: Added multiplexed i2c bus 4
    [    4.146116] i2c i2c-0: Added multiplexed i2c bus 5
    [    4.151612] tps65086 6-005e: Failed to read revision register
    [    4.185499] random: fast init done
    [    4.396215] usb 1-1: new high-speed USB device number 2 using xhci-hcd
    [    4.548706] usb 1-1: New USB device found, idVendor=0424, idProduct=2744, bcdDevice= 2.21
    [    4.556895] usb 1-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
    [    4.564028] usb 1-1: Product: USB2744
    [    4.567680] usb 1-1: Manufacturer: Microchip Tech
    [    4.625561] hub 1-1:1.0: USB hub found
    [    4.629350] hub 1-1:1.0: 4 ports detected
    [    4.689504] usb 2-1: new SuperSpeed Gen 1 USB device number 2 using xhci-hcd
    [    4.716582] usb 2-1: New USB device found, idVendor=0424, idProduct=5744, bcdDevice= 2.21
    [    4.724762] usb 2-1: New USB device strings: Mfr=2, Product=3, SerialNumber=0
    [    4.731895] usb 2-1: Product: USB5744
    [    4.735552] usb 2-1: Manufacturer: Microchip Tech
    [    4.769557] hub 2-1:1.0: USB hub found
    [    4.773342] hub 2-1:1.0: 3 ports detected
    [    4.984213] usb 1-1.2: new full-speed USB device number 3 using xhci-hcd
    [    5.004572] i2c i2c-0: Added multiplexed i2c bus 6
    [    5.010096] ina2xx_adc 7-0040: error configuring the device
    [    5.015715] i2c i2c-0: Added multiplexed i2c bus 7
    [    5.020642] i2c i2c-0: Added multiplexed i2c bus 8
    [    5.025582] i2c i2c-0: Added multiplexed i2c bus 9
    [    5.030377] pca954x 0-0075: registered 8 multiplexed busses for I2C switch pca9548
    [    5.037979] cdns-i2c ff030000.i2c: 100 kHz mmio ff030000 irq 30
    [    5.044866] cdns-wdt fd4d0000.watchdog: Xilinx Watchdog Timer with timeout 60s
    [    5.052372] cdns-wdt ff150000.watchdog: Xilinx Watchdog Timer with timeout 10s
    [    5.090927] usb 1-1.2: New USB device found, idVendor=046d, idProduct=c52b, bcdDevice=12.03
    [    5.099278] usb 1-1.2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
    [    5.106588] usb 1-1.2: Product: USB Receiver
    [    5.110849] usb 1-1.2: Manufacturer: Logitech
    [    5.115308] mmc0: SDHCI controller on ff160000.mmc [ff160000.mmc] using ADMA 64-bit
    [    5.123814] sdhci-arasan ff170000.mmc: allocated mmc-pwrseq
    [    5.160567] mmc1: SDHCI controller on ff170000.mmc [ff170000.mmc] using ADMA 64-bit
    [    5.172327] input: gpio-keys as /devices/platform/gpio-keys/input/input0
    [    5.180563] rtc_zynqmp ffa60000.rtc: setting system clock to 1970-01-01T00:00:07 UTC (7)
    [    5.180585] mmc0: new high speed SDHC card at address 0001
    [    5.188658] of_cfs_init
    [    5.188701] of_cfs_init: OK
    [    5.194867] mmcblk0: mmc0:0001 00000 14.9 GiB 
    [    5.196781] cfg80211: Loading compiled-in X.509 certificates for regulatory database
    [    5.204945]  mmcblk0: p1 p2
    [    5.225841] mmc1: new high speed SDIO card at address 0001
    [    5.235944] input: Logitech USB Receiver as /devices/platform/amba/ff9e0000.usb1/fe300000.dwc3/xhci-hcd.0.auto/usb1/1-1/1-1.2/1-1.2:1.0/0003:046D:C52B.0001/input/input1
    [    5.308558] hid-generic 0003:046D:C52B.0001: input: USB HID v1.11 Keyboard [Logitech USB Receiver] on usb-xhci-hcd.0.auto-1.2/input0
    [    5.324093] input: Logitech USB Receiver Mouse as /devices/platform/amba/ff9e0000.usb1/fe300000.dwc3/xhci-hcd.0.auto/usb1/1-1/1-1.2/1-1.2:1.1/0003:046D:C52B.0002/input/input2
    [    5.339881] input: Logitech USB Receiver Consumer Control as /devices/platform/amba/ff9e0000.usb1/fe300000.dwc3/xhci-hcd.0.auto/usb1/1-1/1-1.2/1-1.2:1.1/0003:046D:C52B.0002/input/input3
    [    5.343514] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
    [    5.362905] clk: Not disabling unused clocks
    [    5.367168] ALSA device list:
    [    5.370128]   #0: DisplayPort monitor
    [    5.374231] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
    [    5.382848] cfg80211: failed to load regulatory.db
    [    5.416366] input: Logitech USB Receiver System Control as /devices/platform/amba/ff9e0000.usb1/fe300000.dwc3/xhci-hcd.0.auto/usb1/1-1/1-1.2/1-1.2:1.1/0003:046D:C52B.0002/input/input4
    [    5.432800] hid-generic 0003:046D:C52B.0002: input: USB HID v1.11 Mouse [Logitech USB Receiver] on usb-xhci-hcd.0.auto-1.2/input1
    [    5.446854] hid-generic 0003:046D:C52B.0003: device has no listeners, quitting
    [    5.484653] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
    [    5.492778] VFS: Mounted root (ext4 filesystem) on device 179:2.
    [    5.509656] devtmpfs: mounted
    [    5.512922] Freeing unused kernel memory: 704K
    [    5.517416] Run /sbin/init as init process
    [    5.532220] usb 1-1.4: new high-speed USB device number 4 using xhci-hcd
    [    5.636939] usb 1-1.4: New USB device found, idVendor=0424, idProduct=2740, bcdDevice= 2.00
    [    5.645309] usb 1-1.4: New USB device strings: Mfr=1, Product=2, SerialNumber=0
    [    5.652623] usb 1-1.4: Product: Hub Controller
    [    5.657062] usb 1-1.4: Manufacturer: Microchip Tech
    
    
    INIT: version 2.88 booting
    
    
    Starting udev
    [    6.094392] udevd[163]: starting version 3.2.8
    [    6.111403] random: udevd: uninitialized urandom read (16 bytes read)
    [    6.118460] random: udevd: uninitialized urandom read (16 bytes read)
    [    6.124930] random: udevd: uninitialized urandom read (16 bytes read)
    [    6.179393] udevd[164]: starting eudev-3.2.8
    [    6.321107] zynqmp_r5_remoteproc ff9a0000.zynqmp-rpu: RPU core_conf: split
    [    6.328719] remoteproc remoteproc0: r5@0 is available
    [    6.348478] mali: loading out-of-tree module taints kernel.
    [    6.378229] xilinx-csi2rxss a0020000.mipi_csi2_rx_subsystem: invalid number of ports 0
    [    6.386192] xilinx-csi2rxss: probe of a0020000.mipi_csi2_rx_subsystem failed with error -22
    [    6.396327] xilinx-vpss-scaler a0080000.v_proc_ss: xlnx,v-vpss-scaler-2.2 - compatible string is getting deprecated!
    [    6.406952] xilinx-vpss-scaler a0080000.v_proc_ss: Reset GPIO not setup in DT
    [    6.414143] xilinx-vpss-scaler: probe of a0080000.v_proc_ss failed with error -2
    [    6.998606] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.
    [    7.109826] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null)
    Fri Mar 19 10:48:27 UTC 2021
    
    
    [    9.252895] urandom_read: 4 callbacks suppressed
    [    9.252903] random: dd: uninitialized urandom read (512 bytes read)
    Starting Ultra96 AP setup daemon.
    
    
    Turning Ultra96 WiFi & Bluetooth LEDs ON...done.
    
    
    
    
    
    [    9.311054] Registering wifi device
    [    9.314585] Max scan ids= 10,Max scan IE len= 1000,Signal Type= 1,Interface Modes= 844
    Starting Flask server deamon to serve Ultra96 startup page[    9.322887] Initializing Locks ...
    [    9.331902] wilc_netdev_ifc_init name[wlan0] vnum[1], idx[0], wilc-type[2] nl-type[2]
    [    9.339879] wifi_pm : 0
    [    9.342351] wifi_pm : 1
    [    9.345082] wilc_sdio mmc1:0001:1: Driver Initializing success
    .
    
    
    
    
    INIT: Entering runlevel: 5
    
    
    
    
    [    9.473896] random: python3: uninitialized urandom read (24 bytes read)
    [    9.493622] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /amba_pl@0/v_proc_ss@a0080000/compatible
    [    9.505129] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /amba_pl@0/v_proc_ss@a0080000/reset-gpios
    [    9.516762] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/ias_out0
    [    9.526589] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/csiss_out
    [    9.536507] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/csiss_in
    [    9.546341] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/scaler_in
    [    9.556265] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/scaler_out
    [    9.566264] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/vcap_csi_in
    [    9.580468] xilinx-video amba_pl@0:vcap_csi: device registered
    [    9.586746] debugfs: Directory '4-003c' with parent 'regmap' already present!
    [    9.594238]  4-003c-ar0144.0: 4-003c-ar0144.0 supply vaa not found, using dummy regulator
    [    9.594696] xilinx-vpss-scaler a0080000.v_proc_ss: xlnx,v-vpss-scaler-2.2 - compatible string is getting deprecated!
    [    9.602530]  4-003c-ar0144.0: 4-003c-ar0144.0 supply vddio not found, using dummy regulator
    [    9.613085] xilinx-video amba_pl@0:vcap_csi: Entity type for entity a0080000.v_proc_ss was not initialized!
    [    9.621366]  4-003c-ar0144.0: 4-003c-ar0144.0 supply vdd not found, using dummy regulator
    [    9.631042] xilinx-vpss-scaler a0080000.v_proc_ss: Num Hori Taps 8
    [    9.631046] xilinx-vpss-scaler a0080000.v_proc_ss: Num Vert Taps 8
    [    9.631049] xilinx-vpss-scaler a0080000.v_proc_ss: VPSS Scaler Probe Successful
    [    9.640785] xilinx-csi2rxss a0020000.mipi_csi2_rx_subsystem: Xilinx CSI2 Rx Subsystem device found!
    [    9.645630]  4-003c-ar0144.1: 4-003c-ar0144.1 supply vaa not found, using dummy regulator
    [    9.651649] xilinx-video amba_pl@0:vcap_csi: Entity type for entity a0020000.mipi_csi2_rx_subsystem was not initialized!
    [    9.687224]  4-003c-ar0144.1: 4-003c-ar0144.1 supply vddio not found, using dummy regulator
    [    9.695632]  4-003c-ar0144.1: 4-003c-ar0144.1 supply vdd not found, using dummy regulator
    [    9.696747] add_virtual_intf name[p2p0] vnum[1], nl-type[2]
    [    9.711644] wilc_netdev_ifc_init name[p2p0] vnum[2], idx[1], wilc-type[2] nl-type[2]
    [    9.722842] WILC POWER UP
    [    9.725548] wilc_sdio mmc1:0001:1: SDIO speed: 50000000
    [    9.731574] wilc_sdio mmc1:0001:1: chipid 003000d0
    [    9.747195] ap1302 4-003c: AP1302 revision 0.2.6 detected
    [    9.753078] wilc_wlan_firmware_downloadDownloading firmware size = 136788
    Starting system message bus: [    9.820686] random: dbus-daemon: uninitialized urandom read (12 bytes read)
    dbus.
    
    
    Configuring network interfaces... [    9.976822] wilc_wlan_firmware_download Offset = 119860
    [    9.984414] wilc_wlan_firmware_download Offset = 136788
    [   10.314860] wilc_sdio mmc1:0001:1: wilc_sdio_disable_interrupt
    Successfully initialized wpa_supplicant
    
    
    [   10.525838] power up request for already powered up source Wifi
    [   10.531798] Device already up. request source is Wifi
    [   10.539007] wilc_wlan_firmware_downloadDownloading firmware size = 136788
    [   10.760952] wilc_wlan_firmware_download Offset = 119860
    [   10.768583] wilc_wlan_firmware_download Offset = 136788
    done.
    
    
    Starting random number generator daemon
    
    
    Initializing available sources
    
    
    
    
    
    
    Failed to init entropy source hwrng
    
    
    
    
    
    
    [   13.640573] add_virtual_intf name[mon.p2p0] vnum[2], nl-type[6]
    [   13.647105] add_virtual_intf:monitor name[p2p0] vnum[2], idx[1], wilc-type[1], nl-type[3]
    [   13.715501] start_ap,dev[p2p0]
    [   15.036240] random: crng init done
    Initializing AES buffer
    
    
    
    
    
    
    Enabling JITTER rng support
    
    
    
    
    
    
    Initializing entropy source jitter
    
    
    
    
    
    
    .
    
    
    Starting Connection Manager
    
    
    Starting haveged: haveged: listening socket at 3
    
    
    haveged: haveged starting up
    
    
    
    
    
    
    
    
    
    
    
    
    Starting OpenBSD Secure Shell server: sshd
    
    
    done.
    
    
    Starting rpcbind daemon...done.
    
    
    starting statd: done
    
    
    Starting bluetooth: bluetoothd.
    
    
    haveged: haveged: ver: 1.9.5; arch: generic; vend: ; build: (gcc 9.2.0 CTV); collect: 128K
    
    
    
    
    
    
    
    
    haveged: haveged: cpu: (VC); data: 16K (D); inst: 16K (D); idx: 11/40; sz: 15456/64452
    
    
    
    
    
    
    
    
    haveged: haveged: tot tests(BA8): A:1/1 B:1/1 continuous tests(B):  last entropy estimate 7.99909
    
    
    
    
    
    
    
    
    haveged: haveged: fills: 0, generated: 0 
    
    
    
    
    
    
    
    
    Starting internet superserver: inetd.
    
    
    exportfs: can't open /etc/exports for reading
    
    
    NFS daemon support not enabled in kernel
    
    
    Starting ntpd: done
    
    
    Starting syslogd/klogd: done
    
    
    Starting internet superserver: xinetd.
    
    
     * Starting Avahi mDNS/DNS-SD Daemon: avahi-daemon
    
    
     [A [74G[ ok ]
    
    
    Starting Telephony daemon
    
    
    Starting watchdog daemon...done
    
    
    Starting Linux NFC daemon
    
    
    Starting tcf-agent: OK
    
    
    
    
    PetaLinux 2020.1 ultra96v2-2020-1 ttyPS0
    
    
    ultra96v2-2020-1 login: root
    
    
    Password: 
    

     

      • Run the 'modetest' tool to ensure the monitor is identified properly from the build.
    root@ultra96v2-2020-1:~# modetest -M xlnx
    Encoders:
    id crtc type possible crtcs possible clones
    41 40 TMDS 0x00000001 0x00000000
    
    
    Connectors:
    id encoder status name size (mm) modes encoders
    42 41 connected DP-1            600x330 31 41
      modes:
    name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot)
      1920x1080 75.00 1920 1968 2000 2120 1080 1083 1088 1110 176490 flags: phsync, pvsync; type: preferred, driver
      1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, nvsync; type: driver
      1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: driver
      1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags: phsync, pvsync; type: driver
      1920x1080 50.00 1920 2448 2492 2640 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: driver
      1680x1050 59.88 1680 1728 1760 1840 1050 1053 1059 1080 119000 flags: phsync, nvsync; type: driver
      1400x1050 59.95 1400 1448 1480 1560 1050 1053 1057 1080 101000 flags: phsync, nvsync; type: driver
      1600x900 60.00 1600 1624 1704 1800 900 901 904 1000 108000 flags: phsync, pvsync; type: driver
      1280x1024 75.02 1280 1296 1440 1688 1024 1025 1028 1066 135000 flags: phsync, pvsync; type: driver
      1280x1024 60.02 1280 1328 1440 1688 1024 1025 1028 1066 108000 flags: phsync, pvsync; type: driver
      1440x900 59.90 1440 1488 1520 1600 900 903 909 926 88750 flags: phsync, nvsync; type: driver
      1280x800 59.91 1280 1328 1360 1440 800 803 809 823 71000 flags: phsync, nvsync; type: driver
      1152x864 75.00 1152 1216 1344 1600 864 865 868 900 108000 flags: phsync, pvsync; type: driver
      1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver
      1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver
      1280x720 59.94 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync, pvsync; type: driver
      1280x720 50.00 1280 1720 1760 1980 720 725 730 750 74250 flags: phsync, pvsync; type: driver
      1024x768 75.03 1024 1040 1136 1312 768 769 772 800 78750 flags: phsync, pvsync; type: driver
      1024x768 60.00 1024 1048 1184 1344 768 771 777 806 65000 flags: nhsync, nvsync; type: driver
      800x600 75.00 800 816 896 1056 600 601 604 625 49500 flags: phsync, pvsync; type: driver
      800x600 60.32 800 840 968 1056 600 601 605 628 40000 flags: phsync, pvsync; type: driver
      720x576 50.00 720 732 796 864 576 581 586 625 27000 flags: nhsync, nvsync; type: driver
      720x480 60.00 720 736 798 858 480 489 495 525 27027 flags: nhsync, nvsync; type: driver
      720x480 60.00 720 736 798 858 480 489 495 525 27027 flags: nhsync, nvsync; type: driver
      720x480 59.94 720 736 798 858 480 489 495 525 27000 flags: nhsync, nvsync; type: driver
      720x480 59.94 720 736 798 858 480 489 495 525 27000 flags: nhsync, nvsync; type: driver
      640x480 75.00 640 656 720 840 480 481 484 500 31500 flags: nhsync, nvsync; type: driver
      640x480 60.00 640 656 752 800 480 490 492 525 25200 flags: nhsync, nvsync; type: driver
      640x480 59.94 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver
      640x480 59.94 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver
      720x400 70.08 720 738 846 900 400 412 414 449 28320 flags: nhsync, pvsync; type: driver
      props:
    1 EDID:
    flags: immutable blob
    blobs:
    
    
    value:
    00ffffffffffff0004727e085ea87003
    251e0103803c2178ea3135a5554ea126
    0c5054a54b00714f81809500b300a9c0
    810081c09040f14480c870381e403020
    350055502100001e000000fd00304b1e
    5515000a202020202020000000fc004b
    323732484c20480a20202020000000ff
    00544e304141303031335730310a01fa
    020325f449900403011412051f132309
    07078301000065030c002000681a0000
    0101304be6023a801871382d40582c45
    0055502100001a011d007251d01e206e
    28550055502100001e8c0ad08a20e02d
    10103e96005550210000180000000000
    00000000000000000000000000000000
    0000000000000000000000000000002d
    

      • Run the 'run_1920_1080' script verify the Dual Camera's are working properllyrun_1920_1080'
    root@ultra96v2-2020-1:~# run_1920_1080 
    setting mode 1920x1080-75.00Hz@RG16 on connectors 42, crtc 40
    testing 1920x1080@YUYV overlay plane 38
    Setting pipeline to PAUSED ...
    Pipeline is live and does not need PREROLL ...
    /GstPipeline:pipeline0/GstKMSSink:kmssink0: display-width = 1920
    /GstPipeline:pipeline0/GstKMSSink:kmssink0: display-height = 1080
    Setting pipeline to PLAYING ...
    New clock: GstSystemClock
    /GstPipeline:pipeline0/GstV4l2Src:v4l2src0.GstPad:src: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    /GstPipeline:pipeline0/GstCapsFilter:capsfilter0.GstPad:src: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    /GstPipeline:pipeline0/GstVideoConvert:videoconvert0.GstPad:src: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    /GstPipeline:pipeline0/GstKMSSink:kmssink0.GstPad:sink: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    /GstPipeline:pipeline0/GstVideoConvert:videoconvert0.GstPad:sink: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    /GstPipeline:pipeline0/GstCapsFilter:capsfilter0.GstPad:sink: caps = video/x-raw, width=(int)1920, height=(int)1080, format=(string)YUY2, framerate=(fraction)60/1, interlace-mode=(string)progressive, colorimetry=(string)bt709
    ^Chandling interrupt.
    Interrupt: Stopping pipeline ...
    Execution ended after 0:12:35.809132410
    Setting pipeline to PAUSED ...
    Setting pipeline to READY ...
    Setting pipeline to NULL ...
    Freeing pipeline ...
    

     

      • If all sent well, both camera should display the same image.

     

      • The Ultra96-V2 Dual Camera Mezzanine Petalinux Build running on the Ultra96-V2

     

        Ultra96-V2 Dual Camera Mezz Hardware Build

      • The other example that was attempted was the Ultra96-V2 ON Semiconductor Dual Camera Mezzanine hardware build instructions posted on element14 by Chris Ammann.
      • This example describes how to build the Hardware project for the ON Semiconductor Dual Camera Mezzanine which could be used with the PentaLinux build shown previously.
      • To run the Hardware Build, the instructions from Chris' post were placed into a script.

                build_ultra96v2_hdw.sh

    #!/bin/bash
    
    
    # 
    # Setup Xilinx environment 
    # It is recommended to also add these lines to the end of your ~/.bashrc file 
    # 
    TOOLS_VER=2020.1 
    source /tools/Xilinx/Vivado/$TOOLS_VER/settings64.sh 
    source /tools/petalinux-v2020.1-final/settings.sh  
    
    
    # 
    # Clone the repositories 
    # 
    
    
    cd ~ 
    mkdir -p git/avnet 
    cd git/avnet/ 
    git clone https://github.com/Avnet/bdf.git 
    git clone https://github.com/Avnet/hdl.git 
    git clone https://github.com/Avnet/petalinux.git 
    cd bdf 
    git checkout master 
    cd ../petalinux 
    git checkout 2020.1 
    cd ../hdl 
    git checkout 2020.1  
    
    
    # 
    # Run the Vivado build script for the Ultra96-V2 dualcam design 
    # 
    
    
    cd Scripts 
    vivado -mode batch -source ./make_ultra96v2_dualcam.tcl 
    

     

      • The result of running the script is as follows.

                    Note: Truncated due to length

    vitis20201@vitis20201-VirtualBox:~$ ./build_ultra96v2_hdw.sh 
    PetaLinux environment set to '/tools/petalinux-v2020.1-final'
    INFO: Checking free disk space
    INFO: Checking installed tools
    INFO: Checking installed development libraries
    INFO: Checking network and other services
    Cloning into 'bdf'...
    remote: Enumerating objects: 123, done.
    remote: Counting objects: 100% (123/123), done.
    remote: Compressing objects: 100% (86/86), done.
    remote: Total 380 (delta 48), reused 110 (delta 37), pack-reused 257
    Receiving objects: 100% (380/380), 23.20 MiB | 7.35 MiB/s, done.
    Resolving deltas: 100% (145/145), done.
    Cloning into 'hdl'...
    remote: Enumerating objects: 669, done.
    remote: Counting objects: 100% (669/669), done.
    remote: Compressing objects: 100% (244/244), done.
    remote: Total 5006 (delta 442), reused 595 (delta 372), pack-reused 4337
    Receiving objects: 100% (5006/5006), 14.86 MiB | 8.31 MiB/s, done.
    Resolving deltas: 100% (3006/3006), done.
    Checking out files: 100% (1874/1874), done.
    Cloning into 'petalinux'...
    remote: Enumerating objects: 209, done.
    remote: Counting objects: 100% (209/209), done.
    remote: Compressing objects: 100% (97/97), done.
    remote: Total 3039 (delta 158), reused 150 (delta 106), pack-reused 2830
    Receiving objects: 100% (3039/3039), 6.14 MiB | 7.48 MiB/s, done.
    Resolving deltas: 100% (1676/1676), done.
    Already on 'master'
    Your branch is up to date with 'origin/master'.
    Branch '2020.1' set up to track remote branch '2020.1' from 'origin'.
    Switched to a new branch '2020.1'
    Branch '2020.1' set up to track remote branch '2020.1' from 'origin'.
    Switched to a new branch '2020.1'
    
    
    ****** Vivado v2020.1 (64-bit)
      **** SW Build 2902540 on Wed May 27 19:54:35 MDT 2020
      **** IP Build 2902112 on Wed May 27 22:43:36 MDT 2020
        ** Copyright 1986-2020 Xilinx, Inc. All Rights Reserved.
    
    
    source ./make_ultra96v2_dualcam.tcl
    # set argv [list board=ULTRA96V2 project=ultra96v2_dualcam sdk=no close_project=no version_override=yes dev_arch=zynqmp]
    # set argc [llength $argv]
    # source ./make.tcl -notrace
    
    
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
    *-                                                     -*
    *-        Welcome to the Avnet Project Builder         -*
    *-                                                     -*
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
    
    
    BDF path set to /home/vitis20201/git/avnet/bdf 
    
    
    
    
    
    
    +------------------+------------------------------------+
    | Setting          |     Configuration                  |
    +------------------+------------------------------------+
    | Board            |     ULTRA96V2                      |
    +------------------+------------------------------------+
    | Project          |     ultra96v2_dualcam              |
    +------------------+------------------------------------+
    | SDK              |     no                             |
    +------------------+------------------------------------+
    | No Close Project |     no                             |
    +------------------+------------------------------------+
    | Version override |     yes                            |
    +------------------+------------------------------------+
    | Device           |     zynqmp                         |
    +------------------+------------------------------------+
    
    
    
    
    
    
    Overriding Version Check, Please Check the Design for Validity!
    
    
    
    
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
     Selected Board and Project as:
     ULTRA96V2 and ultra96v2_dualcam
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
    
    
    
    
    Not Requesting Tag
    Setting Up Project ultra96v2_dualcam...
    
    
    ***** Creating Vivado Project...
    create_project: Time (s): cpu = 00:00:04 ; elapsed = 00:00:08 . Memory (MB): peak = 2032.176 ; gain = 2.016 ; free physical = 4556 ; free virtual = 14803
    ***** Assigning Vivado Project board_part Property to ultra96v2...
    
    
    ***** Generating IP...
    
    
    ***** Updating Vivado to include IP Folder
    INFO: [IP_Flow 19-234] Refreshing IP repositories
    INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/vitis20201/git/avnet/hdl/IP'.
    INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/tools/Xilinx/Vivado/2020.1/data/ip'.
    update_ip_catalog: Time (s): cpu = 00:00:07 ; elapsed = 00:00:17 . Memory (MB): peak = 2032.176 ; gain = 0.000 ; free physical = 4503 ; free virtual = 14790
    
    
    ***** Creating Block Design...
    Wrote  : </home/vitis20201/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ULTRA96V2.bd> 
    create_bd_design: Time (s): cpu = 00:00:01 ; elapsed = 00:00:05 . Memory (MB): peak = 2096.094 ; gain = 21.051 ; free physical = 4444 ; free virtual = 14770
    
    
    ***** Add defined IP blocks to Block Design...
    Wrote  : </home/vitis20201/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ULTRA96V2.bd> 
    Wrote  : </home/vitis20201/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.srcs/sources_1/bd/ULTRA96V2/ULTRA96V2.bd> 
    INFO: [Device 21-403] Loading part xczu3eg-sbva484-1-i
    

     

      • Second half of Hardware Build
    INFO: [Project 1-111] Unisim Transformation Summary:
      A total of 561 instances were transformed.
      DSP48E2 => DSP48E2 (DSP_ALU, DSP_A_B_DATA, DSP_C_DATA, DSP_MULTIPLIER, DSP_M_DATA, DSP_OUTPUT, DSP_PREADD, DSP_PREADD_DATA): 106 instances
      DSP48E2 => DSP48E2 (inverted pins: RSTA) (DSP_ALU, DSP_A_B_DATA, DSP_C_DATA, DSP_MULTIPLIER, DSP_M_DATA, DSP_OUTPUT, DSP_PREADD, DSP_PREADD_DATA): 2 instances
      DSP48E2 => DSP48E2 (inverted pins: RSTB) (DSP_ALU, DSP_A_B_DATA, DSP_C_DATA, DSP_MULTIPLIER, DSP_M_DATA, DSP_OUTPUT, DSP_PREADD, DSP_PREADD_DATA): 1 instance 
      IBUFDS_DPHY => IBUFDS_DPHY (DPHY_DIFFINBUF, IBUFCTRL): 5 instances
      RAM32M16 => RAM32M16 (RAMD32(x14), RAMS32(x2)): 58 instances
      RAM64X1S => RAM64X1S (RAMS64E): 384 instances
      SRLC32E => SRL16E: 5 instances
    
    
    open_run: Time (s): cpu = 00:01:06 ; elapsed = 00:02:27 . Memory (MB): peak = 4069.938 ; gain = 202.023 ; free physical = 4745 ; free virtual = 12004
    
    
    ***** Write and validate the design archive...
    WARNING: [Project 1-971] Hardware Platform (Shell) metadata attributes vendor, board, name, version will be populated from project properties platform.vendor (avnet.com), platform.board_id (ULTRA96V2), platform.name (ULTRA96V2) and platform.version (1.0). The values from PFM_NAME property (avnet.com:av:ULTRA96V2:1.0) on the BD will be over-ridden.
    INFO: [Vivado 12-4895] Creating Hardware Platform: /home/vitis20201/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.xsa ...
    INFO: [Hsi 55-2053] elapsed time for repository (/tools/Xilinx/Vivado/2020.1/data/embeddedsw) loading 2 seconds
    INFO: [Project 1-1042] Successfully generated hpfm file
    write_project_tcl: Time (s): cpu = 00:00:16 ; elapsed = 00:00:41 . Memory (MB): peak = 4158.938 ; gain = 0.000 ; free physical = 4308 ; free virtual = 11919
    INFO: [Vivado 12-4896] Successfully created Hardware Platform: /home/vitis20201/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.xsa
    write_hw_platform: Time (s): cpu = 00:01:10 ; elapsed = 00:01:59 . Memory (MB): peak = 4186.938 ; gain = 117.000 ; free physical = 4248 ; free virtual = 11908
    INFO: [Vivado 12-6074] Validating Hardware Platform: '/home/vitis20201/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.xsa'
    INFO: [Vivado 12-8115] Found XML metadata file: xsa.xml
    INFO: [Vivado 12-6078] Validating platform properties...
    INFO: [Vivado 12-6079] Validating unified platform...
    INFO: [Vivado 12-6073] Validating 'pre_synth' platform state...
    INFO: [Vivado 12-6077] Validating platform files...
    INFO: [Vivado 12-6067] Found file 'ULTRA96V2.bit' of type 'FULL_BIT' in the Hardware Platform.
    INFO: [Vivado 12-6067] Found file 'ULTRA96V2.hpfm' of type 'HPFM' in the Hardware Platform.
    INFO: [Vivado 12-6067] Found file 'prj/rebuild.tcl' of type 'REBUILD_TCL' in the Hardware Platform.
    INFO: [Vivado 12-6339] Detailed Hardware Platform Attribute Information:
    {
        "versionMajor": "1",
        "versionMinor": "0",
        "usesPR": "false",
        "platformState": "pre_synth",
        "topModuleName": "ULTRA96V2_wrapper",
        "acceleratorBinaryFormat": "xclbin2",
        "acceleratorBinaryContent": "bitstream",
        "validAcceleratorBinaryContentValues": "dcp,bitstream",
        "dcpFunctionStripped": "false",
        "dcpEncrypted": "false",
        "defaultOutputType": "sd_card",
        "designIntent": {
            "dataCenter": {
                "value": "false",
                "explicit": "false"
            },
            "embedded": {
                "value": "true",
                "explicit": "false"
            },
            "externalHost": {
                "value": "false",
                "explicit": "false"
            },
            "serverManaged": {
                "value": "false",
                "explicit": "false"
            }
        },
        "board": {
            "name": "avnet.com:ultra96v2:1.1",
            "vendor": "avnet.com",
            "part": "xczu3eg-sbva484-1-i",
            "boardPart": "avnet.com:ultra96v2:part0:1.1",
            "imageFileHdpi": "ultra96v2_top.jpg"
        },
        "devices": [
            {
                "name": "fpga0",
                "type": "8",
                "fpgaPart": "zynquplus:xczu3eg:sbva484:-1:i",
                "part": {
                    "architecture": "zynquplus",
                    "device": "xczu3eg",
                    "package": "sbva484",
                    "speedGrade": "-1",
                    "tempGrade": "i"
                },
                "core": {
                    "name": "OCL_REGION_0",
                    "type": "clc_region",
                    "drBDName": "ULTRA96V2.bd",
                    "numComputeUnits": "60",
                    "availableResources": {
                        "bramCount": "151",
                        "dspCount": "251",
                        "lutCount": "48733",
                        "registerCount": "109837"
                    }
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            }
        ],
        "files": [
            {
                "name": "ULTRA96V2.bit",
                "type": "FULL_BIT"
            },
            {
                "name": "ULTRA96V2.hpfm",
                "type": "HPFM"
            },
            {
                "name": "prj\/rebuild.tcl",
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            },
            {
                "name": "iprepo",
                "type": "IP_REPO_PATH"
            },
            {
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            },
            {
                "name": "board",
                "type": "BOARD_REPO_PATH"
            }
        ],
        "vendor": "avnet.com",
        "boardId": "ULTRA96V2",
        "name": "ULTRA96V2",
        "uniqueName": "avnet.com:ULTRA96V2:ULTRA96V2:1.0",
        "fpgaPart": "zynquplus",
        "fpgaDevice": "xczu3eg",
        "platformFile": "\/home\/vitis20201\/git\/avnet\/hdl\/Projects\/ultra96v2_dualcam\/ULTRA96V2_2020_1\/ULTRA96V2.xsa",
        "unifiedPlatform": "true",
        "expandablePlatform": "true",
        "softwareEmulation": "true",
        "hardwareEmulation": "false",
        "usesNIFD": "false",
        "generatedName": "Vivado",
        "generatedVersion": "2020.1",
        "generatedChangeList": "2902540",
        "generatedTimestamp": "Sun Mar 21 11:27:16 2021",
        "resources": [
            {
                "type": "BRAM",
                "count": "216"
            },
            {
                "type": "DSP",
                "count": "360"
            },
            {
                "type": "LUT",
                "count": "70560"
            },
            {
                "type": "FF",
                "count": "141120"
            },
            {
                "type": "REG",
                "count": "109837"
            }
        ],
        "systemClocks": [
            {
                "default": "false",
                "name": "CPU",
                "origName": "CPU",
                "id": "-1",
                "frequency": "1200.000000",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
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                "period": ".833333",
                "status": "reserved"
            },
            {
                "default": "true",
                "name": "PL 0",
                "origName": "clk_wiz_clk_out1",
                "id": "0",
                "frequency": "200.000000",
                "instRef": "clk_wiz",
                "compRef": "clk_wiz",
                "period": "5.000000",
                "normalizedPeriod": "6.000000",
                "status": "fixed"
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            {
                "default": "false",
                "name": "PL 1",
                "origName": "clk_wiz_clk48M",
                "id": "1",
                "frequency": "48.000000",
                "instRef": "clk_wiz",
                "compRef": "clk_wiz",
                "period": "20.833333",
                "normalizedPeriod": "25.000000",
                "status": "fixed"
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                "name": "PL 2",
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                "id": "2",
                "frequency": "150.000000",
                "instRef": "clk_wiz",
                "compRef": "clk_wiz",
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        "ipParameters": [
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                "value": "1",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
                "compRef": "zynq_ultra_ps_e",
                "valid": "count($designComponent\/xd:connection\/xd:busInterface[@xd:instanceRef=$instance and @xd:name='ZYNQ\/zynq_ultra_ps_e_0_M_AXI_HPM1_FPD'])>0"
            },
            {
                "name": "PSU__USE__S_AXI_GP0",
                "value": "1",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
                "compRef": "zynq_ultra_ps_e",
                "valid": "count($designComponent\/xd:connection\/xd:busInterface[@xd:instanceRef=$instance and @xd:name='ZYNQ\/zynq_ultra_ps_e_0_S_AXI_HPC0_FPD'])>0"
            },
            {
                "name": "PSU__USE__S_AXI_GP1",
                "value": "1",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
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                "valid": "count($designComponent\/xd:connection\/xd:busInterface[@xd:instanceRef=$instance and @xd:name='ZYNQ\/zynq_ultra_ps_e_0_S_AXI_HPC1_FPD'])>0"
            },
            {
                "name": "PSU__USE__S_AXI_GP3",
                "value": "1",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
                "compRef": "zynq_ultra_ps_e",
                "valid": "count($designComponent\/xd:connection\/xd:busInterface[@xd:instanceRef=$instance and @xd:name='ZYNQ\/zynq_ultra_ps_e_0_S_AXI_HP1_FPD'])>0"
            },
            {
                "name": "PSU__USE__S_AXI_GP4",
                "value": "1",
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                "compRef": "zynq_ultra_ps_e",
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            },
            {
                "name": "PSU__USE__S_AXI_GP5",
                "value": "1",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
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            },
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                "dataWidth": "32",
                "numIdBits": "0"
            },
            {
                "name": "ZYNQ\/zynq_ultra_ps_e_0_S_AXI_HPC0_FPD",
                "mode": "slave",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
                "compRef": "zynq_ultra_ps_e",
                "typeRef": "aximm",
                "interfaceRef": "S_AXI_HPC0_FPD",
                "clockRef": "ZYNQ\/zynq_ultra_ps_e_0_saxihpc0_fpd_aclk",
                "memPort": "S_AXI_HPC",
                "spTag": "HPC0",
                "dataWidth": "128",
                "numIdBits": "0",
                "addressSegment": "HPC0_DDR_LOW"
            },
            {
                "name": "ZYNQ\/zynq_ultra_ps_e_0_S_AXI_HPC1_FPD",
                "mode": "slave",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
                "compRef": "zynq_ultra_ps_e",
                "typeRef": "aximm",
                "interfaceRef": "S_AXI_HPC1_FPD",
                "clockRef": "ZYNQ\/zynq_ultra_ps_e_0_saxihpc1_fpd_aclk",
                "memPort": "S_AXI_HPC",
                "spTag": "HPC1",
                "dataWidth": "128",
                "numIdBits": "0",
                "addressSegment": "HPC1_DDR_LOW"
            },
            {
                "name": "ZYNQ\/zynq_ultra_ps_e_0_S_AXI_HP1_FPD",
                "mode": "slave",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
                "compRef": "zynq_ultra_ps_e",
                "typeRef": "aximm",
                "interfaceRef": "S_AXI_HP1_FPD",
                "clockRef": "ZYNQ\/zynq_ultra_ps_e_0_saxihp1_fpd_aclk",
                "memPort": "S_AXI_HP",
                "spTag": "HP1",
                "dataWidth": "128",
                "numIdBits": "0",
                "addressSegment": "HP1_DDR_LOW"
            },
            {
                "name": "ZYNQ\/zynq_ultra_ps_e_0_S_AXI_HP2_FPD",
                "mode": "slave",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
                "compRef": "zynq_ultra_ps_e",
                "typeRef": "aximm",
                "interfaceRef": "S_AXI_HP2_FPD",
                "clockRef": "ZYNQ\/zynq_ultra_ps_e_0_saxihp2_fpd_aclk",
                "memPort": "S_AXI_HP",
                "spTag": "HP2",
                "dataWidth": "128",
                "numIdBits": "0",
                "addressSegment": "HP2_DDR_LOW"
            },
            {
                "name": "ZYNQ\/zynq_ultra_ps_e_0_S_AXI_HP3_FPD",
                "mode": "slave",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
                "compRef": "zynq_ultra_ps_e",
                "typeRef": "aximm",
                "interfaceRef": "S_AXI_HP3_FPD",
                "clockRef": "ZYNQ\/zynq_ultra_ps_e_0_saxihp3_fpd_aclk",
                "memPort": "S_AXI_HP",
                "spTag": "HP3",
                "dataWidth": "128",
                "numIdBits": "0",
                "addressSegment": "HP3_DDR_LOW"
            },
            {
                "name": "ZYNQ\/xlconcat_0_In4",
                "instRef": "ZYNQ\/xlconcat_0",
                "compRef": "xlconcat",
                "typeRef": "interrupt",
                "interfaceRef": "In4",
                "dataWidth": "0",
                "numIdBits": "0"
            },
            {
                "name": "ZYNQ\/xlconcat_0_In5",
                "instRef": "ZYNQ\/xlconcat_0",
                "compRef": "xlconcat",
                "typeRef": "interrupt",
                "interfaceRef": "In5",
                "dataWidth": "0",
                "numIdBits": "0"
            },
            {
                "name": "ZYNQ\/xlconcat_0_In6",
                "instRef": "ZYNQ\/xlconcat_0",
                "compRef": "xlconcat",
                "typeRef": "interrupt",
                "interfaceRef": "In6",
                "dataWidth": "0",
                "numIdBits": "0"
            },
            {
                "name": "ZYNQ\/xlconcat_0_In7",
                "instRef": "ZYNQ\/xlconcat_0",
                "compRef": "xlconcat",
                "typeRef": "interrupt",
                "interfaceRef": "In7",
                "dataWidth": "0",
                "numIdBits": "0"
            },
            {
                "name": "clk_wiz_clk_out1",
                "mode": "master",
                "instRef": "clk_wiz",
                "compRef": "clk_wiz",
                "typeRef": "clock",
                "interfaceRef": "clk_out1",
                "dataWidth": "0",
                "numIdBits": "0"
            },
            {
                "name": "clk_wiz_clk48M",
                "mode": "master",
                "instRef": "clk_wiz",
                "compRef": "clk_wiz",
                "typeRef": "clock",
                "interfaceRef": "clk48M",
                "dataWidth": "0",
                "numIdBits": "0"
            },
            {
                "name": "clk_wiz_clk_out3",
                "mode": "master",
                "instRef": "clk_wiz",
                "compRef": "clk_wiz",
                "typeRef": "clock",
                "interfaceRef": "clk_out3",
                "dataWidth": "0",
                "numIdBits": "0"
            },
            {
                "name": "ZYNQ\/zynq_ultra_ps_e_0_maxihpm1_fpd_aclk",
                "mode": "slave",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
                "compRef": "zynq_ultra_ps_e",
                "typeRef": "clock",
                "interfaceRef": "maxihpm1_fpd_aclk",
                "dataWidth": "0",
                "numIdBits": "0"
            },
            {
                "name": "ZYNQ\/zynq_ultra_ps_e_0_saxihpc0_fpd_aclk",
                "mode": "slave",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
                "compRef": "zynq_ultra_ps_e",
                "typeRef": "clock",
                "interfaceRef": "saxihpc0_fpd_aclk",
                "dataWidth": "0",
                "numIdBits": "0"
            },
            {
                "name": "ZYNQ\/zynq_ultra_ps_e_0_saxihpc1_fpd_aclk",
                "mode": "slave",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
                "compRef": "zynq_ultra_ps_e",
                "typeRef": "clock",
                "interfaceRef": "saxihpc1_fpd_aclk",
                "dataWidth": "0",
                "numIdBits": "0"
            },
            {
                "name": "ZYNQ\/zynq_ultra_ps_e_0_saxihp1_fpd_aclk",
                "mode": "slave",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
                "compRef": "zynq_ultra_ps_e",
                "typeRef": "clock",
                "interfaceRef": "saxihp1_fpd_aclk",
                "dataWidth": "0",
                "numIdBits": "0"
            },
            {
                "name": "ZYNQ\/zynq_ultra_ps_e_0_saxihp2_fpd_aclk",
                "mode": "slave",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
                "compRef": "zynq_ultra_ps_e",
                "typeRef": "clock",
                "interfaceRef": "saxihp2_fpd_aclk",
                "dataWidth": "0",
                "numIdBits": "0"
            },
            {
                "name": "ZYNQ\/zynq_ultra_ps_e_0_saxihp3_fpd_aclk",
                "mode": "slave",
                "instRef": "ZYNQ\/zynq_ultra_ps_e_0",
                "compRef": "zynq_ultra_ps_e",
                "typeRef": "clock",
                "interfaceRef": "saxihp3_fpd_aclk",
                "dataWidth": "0",
                "numIdBits": "0"
            },
            {
                "name": "ZYNQ\/rst_clk_wiz_100M_peripheral_reset",
                "mode": "master",
                "instRef": "ZYNQ\/rst_clk_wiz_100M",
                "compRef": "proc_sys_reset",
                "typeRef": "reset",
                "interfaceRef": "peripheral_reset",
                "clockRef": "clk_wiz_clk_out1",
                "dataWidth": "0",
                "numIdBits": "0"
            },
            {
                "name": "ZYNQ\/rst_clk_wiz_100M_interconnect_aresetn",
                "mode": "master",
                "instRef": "ZYNQ\/rst_clk_wiz_100M",
                "compRef": "proc_sys_reset",
                "typeRef": "reset",
                "interfaceRef": "interconnect_aresetn",
                "clockRef": "clk_wiz_clk_out1",
                "dataWidth": "0",
                "numIdBits": "0"
            },
            {
                "name": "ZYNQ\/rst_clk_wiz_100M_peripheral_aresetn",
                "mode": "master",
                "instRef": "ZYNQ\/rst_clk_wiz_100M",
                "compRef": "proc_sys_reset",
                "typeRef": "reset",
                "interfaceRef": "peripheral_aresetn",
                "clockRef": "clk_wiz_clk_out1",
                "dataWidth": "0",
                "numIdBits": "0"
            }
        ]
    }
    
    
    INFO: [Vivado 12-6066] Finished running validate_dsa for file: '/home/vitis20201/git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/ULTRA96V2.xsa'
    ***** Close the implemented design...
    Generating Binary...
    Found End of Bitstream Creation...
    Not Closing Project...
    Not Running Tag
    
    
    Your Build Took
    seconds [7363]
    
    
    or a total of:
    
    
    days [0]
    hrs  [2]
    min  [2]
    sec  [43]
    
    
    to complete
    
    
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
    *-                                                     -*
    *-            Finished Running Script                  -*
    *-                                                     -*
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
    *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
    
    
    INFO: [Common 17-206] Exiting Vivado at Sun Mar 21 11:29:18 2021...
    vitis20201@vitis20201-VirtualBox:~$ 
    

     

      • The end result is the hdl files located under the following:
    vitis20201@vitis20201-VirtualBox:~$ ls git/avnet/hdl/Projects/ultra96v2_dualcam/ULTRA96V2_2020_1/
    buildInfo.log    ULTRA96V2.hbs  ULTRA96V2.ip_user_files  ULTRA96V2.srcs  ULTRA96V2.xsa
    ULTRA96V2.cache  ULTRA96V2.hw   ULTRA96V2.runs           ULTRA96V2.xpr
    

      • Use Vivado to open the project and view the block diagram or load the project on to the Ultra96-V2
        • NOTE: This project was not loaded on the Ultra96-V2 in this instance.

     

        Vitis-AI 1.2 Flow for Avnet VITIS Platforms

    Xilinx Zynq MP First Stage Boot Loader 
    
    
    Release 2020.2   Jan 25 2021  -  16:04:34
    NOTICE:  ATF running on XCZU3EG/silicon v4/RTL5.1 at 0xfffea000
    NOTICE:  BL31: v2.2(release):xilinx_rebase_v2.2_2020.2
    NOTICE:  BL31: Built : 05:27:17, Jan 26 2021
    
    
    
    
    U-Boot 2020.01 (Jan 26 2021 - 05:29:58 +0000)
    
    
    Model: Avnet Ultra96 Rev1
    Board: Xilinx ZynqMP
    DRAM:  2 GiB
    PMUFW: v1.1
    EL Level: EL2
    Chip ID: zu3eg
    NAND:  0 MiB
    MMC:   mmc@ff160000: 0, mmc@ff170000: 1
    In:    serial@ff010000
    Out:   serial@ff010000
    Err:   serial@ff010000
    Bootmode: SD_MODE
    Reset reason: EXTERNAL 
    Net:   No ethernet found.
    Hit any key to stop autoboot:  2     1     0 
    switch to partitions #0, OK
    mmc0 is current device
    Scanning mmc 0:1...
    Found U-Boot script /boot.scr
    2007 bytes read in 19 ms (102.5 KiB/s)
    ## Executing script at 20000000
    8620228 bytes read in 640 ms (12.8 MiB/s)
    ## Loading kernel from FIT Image at 10000000 ...
       Using 'conf@system-top.dtb' configuration
       Trying 'kernel@1' kernel subimage
         Description:  Linux kernel
         Type:         Kernel Image
         Compression:  gzip compressed
         Data Start:   0x100000f4
         Data Size:    8556322 Bytes = 8.2 MiB
         Architecture: AArch64
         OS:           Linux
         Load Address: 0x00080000
         Entry Point:  0x00080000
         Hash algo:    sha256
         Hash value:   58a0425a4f6ce677a2f181e2ae7203f67763672dc01c0b921bf1fe32e6981dcc
       Verifying Hash Integrity ... sha256+ OK
    ## Loading fdt from FIT Image at 10000000 ...
       Using 'conf@system-top.dtb' configuration
       Trying 'fdt@system-top.dtb' fdt subimage
         Description:  Flattened Device Tree blob
         Type:         Flat Device Tree
         Compression:  uncompressed
         Data Start:   0x10829128
         Data Size:    62002 Bytes = 60.5 KiB
         Architecture: AArch64
         Hash algo:    sha256
         Hash value:   52e8d703517ae519d9f3a94cddaa68114a8766712755b613dad84f4e11b8f13a
       Verifying Hash Integrity ... sha256+ OK
       Booting using the fdt blob at 0x10829128
       Uncompressing Kernel Image
       Loading Device Tree to 000000000ffed000, end 000000000ffff231 ... OK
    
    
    Starting kernel ...
    
    
    [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
    [    0.000000] Linux version 5.4.0-xilinx-v2020.2 (oe-user@oe-host) (gcc version 9.2.0 (GCC)) #1 SMP Tue Jan 26 05:28:46 UTC 2021
    [    0.000000] Machine model: Avnet Ultra96 Rev1
    [    0.000000] earlycon: cdns0 at MMIO 0x00000000ff010000 (options '115200n8')
    [    0.000000] printk: bootconsole [cdns0] enabled
    [    0.000000] efi: Getting EFI parameters from FDT:
    [    0.000000] efi: UEFI not found.
    [    0.000000] Reserved memory: created DMA memory pool at 0x000000003ed40000, size 1 MiB
    [    0.000000] OF: reserved mem: initialized node rproc@3ed400000, compatible id shared-dma-pool
    [    0.000000] cma: Reserved 512 MiB at 0x000000005fc00000
    [    0.000000] psci: probing for conduit method from DT.
    [    0.000000] psci: PSCIv1.1 detected in firmware.
    [    0.000000] psci: Using standard PSCI v0.2 function IDs
    [    0.000000] psci: MIGRATE_INFO_TYPE not supported.
    [    0.000000] psci: SMC Calling Convention v1.1
    [    0.000000] percpu: Embedded 21 pages/cpu s48600 r8192 d29224 u86016
    [    0.000000] Detected VIPT I-cache on CPU0
    [    0.000000] CPU features: detected: ARM erratum 845719
    [    0.000000] Speculative Store Bypass Disable mitigation not required
    [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 515524
    [    0.000000] Kernel command line:  earlycon console=ttyPS0,115200 clk_ignore_unused root=/dev/mmcblk0p2 rw rootwait
    [    0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
    [    0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
    [    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
    [    0.000000] Memory: 1511748K/2094848K available (12284K kernel code, 756K rwdata, 3812K rodata, 704K init, 562K bss, 58812K reserved, 524288K cma-reserved)
    [    0.000000] rcu: Hierarchical RCU implementation.
    [    0.000000] rcu: RCU event tracing is enabled.
    [    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
    [    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
    [    0.000000] GIC: Adjusting CPU interface base to 0x00000000f902f000
    [    0.000000] GIC: Using split EOI/Deactivate mode
    [    0.000000] irq-xilinx: /amba/axi-interrupt-ctrl: num_irq=32, sw_irq=0, edge=0x0
    [    0.000000] random: get_random_bytes called from start_kernel+0x2a8/0x42c with crng_init=0
    [    0.000000] arch_timer: cp15 timer(s) running at 100.00MHz (phys).
    [    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x171024e7e0, max_idle_ns: 440795205315 ns
    [    0.000004] sched_clock: 56 bits at 100MHz, resolution 10ns, wraps every 4398046511100ns
    [    0.008485] Console: colour dummy device 80x25
    [    0.012488] Calibrating delay loop (skipped), value calculated using timer frequency.. 200.00 BogoMIPS (lpj=400000)
    [    0.022838] pid_max: default: 32768 minimum: 301
    [    0.027628] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
    [    0.034789] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
    [    0.044054] ASID allocator initialised with 32768 entries
    [    0.047997] rcu: Hierarchical SRCU implementation.
    [    0.052983] EFI services will not be available.
    [    0.057356] smp: Bringing up secondary CPUs ...
    [    0.062119] Detected VIPT I-cache on CPU1
    [    0.062174] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
    [    0.062605] Detected VIPT I-cache on CPU2
    [    0.062626] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
    [    0.062999] Detected VIPT I-cache on CPU3
    [    0.063020] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
    [    0.063070] smp: Brought up 1 node, 4 CPUs
    [    0.097140] SMP: Total of 4 processors activated.
    [    0.101812] CPU features: detected: 32-bit EL0 Support
    [    0.106916] CPU features: detected: CRC32 instructions
    [    0.112058] CPU: All CPU(s) started at EL2
    [    0.116099] alternatives: patching kernel code
    [    0.121830] devtmpfs: initialized
    [    0.130924] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
    [    0.135029] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
    [    0.161376] xor: measuring software checksum speed
    [    0.198065]    8regs     :  2375.000 MB/sec
    [    0.238090]    32regs    :  2725.000 MB/sec
    [    0.278122]    arm64_neon:  2365.000 MB/sec
    [    0.278162] xor: using function: 32regs (2725.000 MB/sec)
    [    0.282099] pinctrl core: initialized pinctrl subsystem
    [    0.287823] DMI not present or invalid.
    [    0.291472] NET: Registered protocol family 16
    [    0.297127] DMA: preallocated 256 KiB pool for atomic allocations
    [    0.301509] audit: initializing netlink subsys (disabled)
    [    0.306945] audit: type=2000 audit(0.248:1): state=initialized audit_enabled=0 res=1
    [    0.314716] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
    [    0.321462] Serial: AMBA PL011 UART driver
    [    0.341430] HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages
    [    0.342485] HugeTLB registered 32.0 MiB page size, pre-allocated 0 pages
    [    0.349155] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
    [    0.355829] HugeTLB registered 64.0 KiB page size, pre-allocated 0 pages
    [    1.426396] cryptd: max_cpu_qlen set to 1000
    [    1.452589] DRBG: Continuing without Jitter RNG
    [    1.528212] raid6: neonx8   gen()  1560 MB/s
    [    1.596248] raid6: neonx8   xor()  1465 MB/s
    [    1.664286] raid6: neonx4   gen()  1489 MB/s
    [    1.732333] raid6: neonx4   xor()  1420 MB/s
    [    1.800396] raid6: neonx2   gen()  1146 MB/s
    [    1.868436] raid6: neonx2   xor()  1178 MB/s
    [    1.936487] raid6: neonx1   gen()   750 MB/s
    [    2.004551] raid6: neonx1   xor()   889 MB/s
    [    2.072589] raid6: int64x8  gen()  1165 MB/s
    [    2.140636] raid6: int64x8  xor()   760 MB/s
    [    2.208685] raid6: int64x4  gen()   986 MB/s
    [    2.276728] raid6: int64x4  xor()   735 MB/s
    [    2.344779] raid6: int64x2  gen()   690 MB/s
    [    2.412822] raid6: int64x2  xor()   600 MB/s
    [    2.480941] raid6: int64x1  gen()   460 MB/s
    [    2.548956] raid6: int64x1  xor()   457 MB/s
    [    2.548997] raid6: using algorithm neonx8 gen() 1560 MB/s
    [    2.552952] raid6: .... xor() 1465 MB/s, rmw enabled
    [    2.557884] raid6: using neon recovery algorithm
    [    2.563421] iommu: Default domain type: Translated 
    [    2.567618] SCSI subsystem initialized
    [    2.571221] usbcore: registered new interface driver usbfs
    [    2.576513] usbcore: registered new interface driver hub
    [    2.581792] usbcore: registered new device driver usb
    [    2.586814] mc: Linux media interface: v0.10
    [    2.591032] videodev: Linux video capture interface: v2.00
    [    2.596482] pps_core: LinuxPPS API ver. 1 registered
    [    2.601392] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
    [    2.610488] PTP clock support registered
    [    2.614381] EDAC MC: Ver: 3.0.0
    [    2.617961] zynqmp-ipi-mbox mailbox@ff990400: Registered ZynqMP IPI mbox with TX/RX channels.
    [    2.626228] zynqmp-ipi-mbox mailbox@ff90000: Registered ZynqMP IPI mbox with TX/RX channels.
    [    2.634458] FPGA manager framework
    [    2.637874] Advanced Linux Sound Architecture Driver Initialized.
    [    2.644156] Bluetooth: Core ver 2.22
    [    2.647341] NET: Registered protocol family 31
    [    2.651737] Bluetooth: HCI device and connection manager initialized
    [    2.658056] Bluetooth: HCI socket layer initialized
    [    2.662897] Bluetooth: L2CAP socket layer initialized
    [    2.667918] Bluetooth: SCO socket layer initialized
    [    2.673202] clocksource: Switched to clocksource arch_sys_counter
    [    2.678955] VFS: Disk quotas dquot_6.6.0
    [    2.682758] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
    [    2.694011] NET: Registered protocol family 2
    [    2.694514] tcp_listen_portaddr_hash hash table entries: 1024 (order: 2, 16384 bytes, linear)
    [    2.702388] TCP established hash table entries: 16384 (order: 5, 131072 bytes, linear)
    [    2.710318] TCP bind hash table entries: 16384 (order: 6, 262144 bytes, linear)
    [    2.717927] TCP: Hash tables configured (established 16384 bind 16384)
    [    2.724100] UDP hash table entries: 1024 (order: 3, 32768 bytes, linear)
    [    2.730664] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes, linear)
    [    2.737880] NET: Registered protocol family 1
    [    2.742410] RPC: Registered named UNIX socket transport module.
    [    2.747932] RPC: Registered udp transport module.
    [    2.752600] RPC: Registered tcp transport module.
    [    2.757267] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [    2.763982] PCI: CLS 0 bytes, default 64
    [    2.799631] Initialise system trusted keyrings
    [    2.799797] workingset: timestamp_bits=46 max_order=19 bucket_order=0
    [    2.805855] NFS: Registering the id_resolver key type
    [    2.809912] Key type id_resolver registered
    [    2.814021] Key type id_legacy registered
    [    2.818008] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
    [    2.824680] jffs2: version 2.2. (NAND) (SUMMARY)  © 2001-2006 Red Hat, Inc.
    [    2.845052] NET: Registered protocol family 38
    [    2.845099] Key type asymmetric registered
    [    2.847923] Asymmetric key parser 'x509' registered
    [    2.852794] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 246)
    [    2.860119] io scheduler mq-deadline registered
    [    2.864614] io scheduler kyber registered
    [    2.871091] ps_pcie_dma init()
    [    2.898705] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
    [    2.901580] a0010000.serial: ttyS3 at MMIO 0xa0011000 (irq = 82, base_baud = 6250000) is a 16550A
    [    2.908818] a0020000.serial: ttyS1 at MMIO 0xa0021000 (irq = 83, base_baud = 6250000) is a 16550A
    [    2.917294] Serial: AMBA driver
    [    2.922809] cacheinfo: Unable to detect cache hierarchy for CPU 0
    [    2.931488] brd: module loaded
    [    2.937796] loop: module loaded
    [    2.939007] mtdoops: mtd device (mtddev=name/number) must be supplied
    [    2.943299] libphy: Fixed MDIO Bus: probed
    [    2.947011] tun: Universal TUN/TAP device driver, 1.6
    [    2.950980] CAN device driver interface
    [    2.955520] usbcore: registered new interface driver rtl8150
    [    2.960252] usbcore: registered new interface driver r8152
    [    2.965701] usbcore: registered new interface driver asix
    [    2.971058] usbcore: registered new interface driver ax88179_178a
    [    2.977110] usbcore: registered new interface driver cdc_ether
    [    2.982906] usbcore: registered new interface driver net1080
    [    2.988529] usbcore: registered new interface driver cdc_subset
    [    2.994412] usbcore: registered new interface driver zaurus
    [    2.999962] usbcore: registered new interface driver cdc_ncm
    [    3.006595] usbcore: registered new interface driver uas
    [    3.010860] usbcore: registered new interface driver usb-storage
    [    3.017001] gadgetfs: USB Gadget filesystem, version 24 Aug 2004
    [    3.023202] rtc_zynqmp ffa60000.rtc: registered as rtc0
    [    3.028020] i2c /dev entries driver
    [    3.033332] usbcore: registered new interface driver uvcvideo
    [    3.037114] USB Video Class driver (1.1.1)
    [    3.041840] Bluetooth: HCI UART driver ver 2.3
    [    3.045608] Bluetooth: HCI UART protocol H4 registered
    [    3.050702] Bluetooth: HCI UART protocol BCSP registered
    [    3.055996] Bluetooth: HCI UART protocol LL registered
    [    3.061084] Bluetooth: HCI UART protocol ATH3K registered
    [    3.066460] Bluetooth: HCI UART protocol Three-wire (H5) registered
    [    3.072711] Bluetooth: HCI UART protocol Intel registered
    [    3.078050] Bluetooth: HCI UART protocol QCA registered
    [    3.083252] usbcore: registered new interface driver bcm203x
    [    3.088874] usbcore: registered new interface driver bpa10x
    [    3.094412] usbcore: registered new interface driver bfusb
    [    3.099859] usbcore: registered new interface driver btusb
    [    3.105325] usbcore: registered new interface driver ath3k
    [    3.110859] EDAC MC: ECC not enabled
    [    3.114428] EDAC DEVICE0: Giving out device to module edac controller cache_err: DEV edac (POLLED)
    [    3.123367] EDAC DEVICE1: Giving out device to module zynqmp-ocm-edac controller zynqmp_ocm: DEV ff960000.memory-controller (INTERRUPT)
    [    3.135545] pwrseq_simple sdio_pwrseq: mmc failed to get default resetn GPIO
    [    3.142320] pwrseq_simple sdio_pwrseq: mmc failed to get default chip_en GPIO
    [    3.149543] sdhci: Secure Digital Host Controller Interface driver
    [    3.155540] sdhci: Copyright(c) Pierre Ossman
    [    3.159864] sdhci-pltfm: SDHCI platform and OF driver helper
    [    3.165940] ledtrig-cpu: registered to indicate activity on CPUs
    [    3.171515] zynqmp_firmware_probe Platform Management API v1.1
    [    3.177254] zynqmp_firmware_probe Trustzone version v1.0
    [    3.186200] zynqmp-pinctrl firmware:zynqmp-firmware:pinctrl: zynqmp pinctrl initialized
    [    3.214901] alg: No test for xilinx-zynqmp-aes (zynqmp-aes)
    [    3.215198] zynqmp_aes zynqmp_aes: AES Successfully Registered
    [    3.215198] 
    
    
    [    3.222444] alg: No test for xilinx-keccak-384 (zynqmp-keccak-384)
    [    3.228613] alg: No test for xilinx-zynqmp-rsa (zynqmp-rsa)
    [    3.234210] usbcore: registered new interface driver usbhid
    [    3.239405] usbhid: USB HID core driver
    [    3.243459] xlnk xlnk: Major 242
    [    3.246542] xlnk xlnk: xlnk driver loaded
    [    3.250390] xlnk xlnk: xlnk_pdev is not null
    [    3.257105] ARM CCI_400_r1 PMU driver probed
    [    3.257689] fpga_manager fpga0: Xilinx ZynqMP FPGA Manager registered
    [    3.265740] usbcore: registered new interface driver snd-usb-audio
    [    3.272440] pktgen: Packet Generator for packet performance testing. Version: 2.75
    [    3.279755] Initializing XFRM netlink socket
    [    3.283292] NET: Registered protocol family 10
    [    3.288163] Segment Routing with IPv6
    [    3.291366] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
    [    3.297554] NET: Registered protocol family 17
    [    3.301523] NET: Registered protocol family 15
    [    3.305941] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.
    [    3.318809] can: controller area network core (rev 20170425 abi 9)
    [    3.324986] NET: Registered protocol family 29
    [    3.329362] can: raw protocol (rev 20170425)
    [    3.333602] can: broadcast manager protocol (rev 20170425 t)
    [    3.339225] can: netlink gateway (rev 20190810) max_hops=1
    [    3.344774] Bluetooth: RFCOMM TTY layer initialized
    [    3.349525] Bluetooth: RFCOMM socket layer initialized
    [    3.354646] Bluetooth: RFCOMM ver 1.11
    [    3.358344] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
    [    3.363615] Bluetooth: BNEP filters: protocol multicast
    [    3.368806] Bluetooth: BNEP socket layer initialized
    [    3.373735] Bluetooth: HIDP (Human Interface Emulation) ver 1.2
    [    3.379621] Bluetooth: HIDP socket layer initialized
    [    3.384710] 9pnet: Installing 9P2000 support
    [    3.388820] Key type dns_resolver registered
    [    3.393406] registered taskstats version 1
    [    3.397084] Loading compiled-in X.509 certificates
    [    3.403435] Btrfs loaded, crc32c=crc32c-generic
    [    3.418576] ff000000.serial: ttyPS2 at MMIO 0xff000000 (irq = 41, base_baud = 6249999) is a xuartps
    [    3.422599] ff010000.serial: ttyPS0 at MMIO 0xff010000 (irq = 42, base_baud = 6249999) is a xuartps
    [    3.436606] printk: console [ttyPS0] enabled
    [    3.436606] printk: console [ttyPS0] enabled
    [    3.440909] printk: bootconsole [cdns0] disabled
    [    3.440909] printk: bootconsole [cdns0] disabled
    [    3.450111] of-fpga-region fpga-full: FPGA Region probed
    [    3.460327] GPIO IRQ not connected
    [    3.463728] XGpio: gpio@a0030000: registered, base is 510
    [    3.469125] GPIO IRQ not connected
    [    3.472654] XGpio: gpio@a0030000: dual channel registered, base is 508
    [    3.479381] GPIO IRQ not connected
    [    3.482778] XGpio: gpio@a0040000: registered, base is 507
    [    3.488375] GPIO IRQ not connected
    [    3.491776] XGpio: gpio@a0050000: registered, base is 506
    [    3.497170] GPIO IRQ not connected
    [    3.500706] XGpio: gpio@a0050000: dual channel registered, base is 505
    [    3.508171] xilinx-dpdma fd4c0000.dma: Xilinx DPDMA engine is probed
    [    3.514781] xilinx-zynqmp-dma fd500000.dma: ZynqMP DMA driver Probe success
    [    3.521904] xilinx-zynqmp-dma fd510000.dma: ZynqMP DMA driver Probe success
    [    3.529023] xilinx-zynqmp-dma fd520000.dma: ZynqMP DMA driver Probe success
    [    3.536149] xilinx-zynqmp-dma fd530000.dma: ZynqMP DMA driver Probe success
    [    3.543279] xilinx-zynqmp-dma fd540000.dma: ZynqMP DMA driver Probe success
    [    3.550400] xilinx-zynqmp-dma fd550000.dma: ZynqMP DMA driver Probe success
    [    3.557519] xilinx-zynqmp-dma fd560000.dma: ZynqMP DMA driver Probe success
    [    3.564647] xilinx-zynqmp-dma fd570000.dma: ZynqMP DMA driver Probe success
    [    3.571843] xilinx-zynqmp-dma ffa80000.dma: ZynqMP DMA driver Probe success
    [    3.578967] xilinx-zynqmp-dma ffa90000.dma: ZynqMP DMA driver Probe success
    [    3.586094] xilinx-zynqmp-dma ffaa0000.dma: ZynqMP DMA driver Probe success
    [    3.593226] xilinx-zynqmp-dma ffab0000.dma: ZynqMP DMA driver Probe success
    [    3.600344] xilinx-zynqmp-dma ffac0000.dma: ZynqMP DMA driver Probe success
    [    3.607468] xilinx-zynqmp-dma ffad0000.dma: ZynqMP DMA driver Probe success
    [    3.614591] xilinx-zynqmp-dma ffae0000.dma: ZynqMP DMA driver Probe success
    [    3.621731] xilinx-zynqmp-dma ffaf0000.dma: ZynqMP DMA driver Probe success
    [    3.629123] xilinx-psgtr fd400000.zynqmp_phy: Lane:1 type:8 protocol:4 pll_locked:yes
    [    3.640432] xilinx-dp-snd-codec fd4a0000.zynqmp-display:zynqmp_dp_snd_codec0: Xilinx DisplayPort Sound Codec probed
    [    3.651154] xilinx-dp-snd-pcm zynqmp_dp_snd_pcm0: Xilinx DisplayPort Sound PCM probed
    [    3.659201] xilinx-dp-snd-pcm zynqmp_dp_snd_pcm1: Xilinx DisplayPort Sound PCM probed
    [    3.667960] xilinx-dp-snd-card fd4a0000.zynqmp-display:zynqmp_dp_snd_card: xilinx-dp-snd-codec-dai <-> xilinx-dp-snd-codec-dai mapping ok
    [    3.680457] xilinx-dp-snd-card fd4a0000.zynqmp-display:zynqmp_dp_snd_card: xilinx-dp-snd-codec-dai <-> xilinx-dp-snd-codec-dai mapping ok
    [    3.692805] xilinx-dp-snd-card fd4a0000.zynqmp-display:zynqmp_dp_snd_card: ASoC: no DMI vendor name!
    [    3.702375] xilinx-dp-snd-card fd4a0000.zynqmp-display:zynqmp_dp_snd_card: Xilinx DisplayPort Sound Card probed
    [    3.712564] OF: graph: no port node found in /amba/zynqmp-display@fd4a0000
    [    3.719608] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
    [    3.726214] [drm] No driver support for vblank timestamp query.
    [    3.732253] xlnx-drm xlnx-drm.0: bound fd4a0000.zynqmp-display (ops 0xffff800010d4ba80)
    [    3.942279] Console: switching to colour frame buffer device 240x67
    [    3.961881] zynqmp-display fd4a0000.zynqmp-display: fb0: xlnxdrmfb frame buffer device
    [    3.970114] [drm] Initialized xlnx 1.0.0 20130509 for fd4a0000.zynqmp-display on minor 0
    [    3.978234] zynqmp-display fd4a0000.zynqmp-display: ZynqMP DisplayPort Subsystem driver probed
    [    3.988992] xilinx-axipmon ffa00000.perf-monitor: Probed Xilinx APM
    [    3.995541] xilinx-axipmon fd0b0000.perf-monitor: Probed Xilinx APM
    [    4.002060] xilinx-axipmon fd490000.perf-monitor: Probed Xilinx APM
    [    4.008585] xilinx-axipmon ffa10000.perf-monitor: Probed Xilinx APM
    [    4.015661] dwc3 fe200000.dwc3: Failed to get clk 'ref': -2
    [    4.021479] xilinx-psgtr fd400000.zynqmp_phy: Lane:2 type:0 protocol:3 pll_locked:yes
    [    4.033071] dwc3 fe300000.dwc3: Failed to get clk 'ref': -2
    [    4.038869] xilinx-psgtr fd400000.zynqmp_phy: Lane:3 type:1 protocol:3 pll_locked:yes
    [    4.049166] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    [    4.054669] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
    [    4.062465] xhci-hcd xhci-hcd.0.auto: hcc params 0x0238f625 hci version 0x100 quirks 0x0000000202010010
    [    4.071896] xhci-hcd xhci-hcd.0.auto: irq 88, io mem 0xfe300000
    [    4.078148] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.04
    [    4.086409] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [    4.093636] usb usb1: Product: xHCI Host Controller
    [    4.098507] usb usb1: Manufacturer: Linux 5.4.0-xilinx-v2020.2 xhci-hcd
    [    4.105115] usb usb1: SerialNumber: xhci-hcd.0.auto
    [    4.110366] hub 1-0:1.0: USB hub found
    [    4.114139] hub 1-0:1.0: 1 port detected
    [    4.118282] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    [    4.123773] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
    [    4.131435] xhci-hcd xhci-hcd.0.auto: Host supports USB 3.0 SuperSpeed
    [    4.138019] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
    [    4.146184] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.04
    [    4.154453] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [    4.161678] usb usb2: Product: xHCI Host Controller
    [    4.166550] usb usb2: Manufacturer: Linux 5.4.0-xilinx-v2020.2 xhci-hcd
    [    4.173157] usb usb2: SerialNumber: xhci-hcd.0.auto
    [    4.178285] hub 2-0:1.0: USB hub found
    [    4.182052] hub 2-0:1.0: 1 port detected
    [    4.187933] i2c i2c-0: Added multiplexed i2c bus 2
    [    4.192869] i2c i2c-0: Added multiplexed i2c bus 3
    [    4.197813] i2c i2c-0: Added multiplexed i2c bus 4
    [    4.202753] i2c i2c-0: Added multiplexed i2c bus 5
    [    4.208274] tps65086 6-005e: Failed to read revision register
    [    4.241620] random: fast init done
    [    4.453211] usb 1-1: new high-speed USB device number 2 using xhci-hcd
    [    4.605708] usb 1-1: New USB device found, idVendor=0424, idProduct=2744, bcdDevice= 2.21
    [    4.613905] usb 1-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
    [    4.621036] usb 1-1: Product: USB2744
    [    4.624690] usb 1-1: Manufacturer: Microchip Tech
    [    4.682112] hub 1-1:1.0: USB hub found
    [    4.685902] hub 1-1:1.0: 4 ports detected
    [    4.746038] usb 2-1: new SuperSpeed Gen 1 USB device number 2 using xhci-hcd
    [    4.769580] usb 2-1: New USB device found, idVendor=0424, idProduct=5744, bcdDevice= 2.21
    [    4.777767] usb 2-1: New USB device strings: Mfr=2, Product=3, SerialNumber=0
    [    4.784898] usb 2-1: Product: USB5744
    [    4.788557] usb 2-1: Manufacturer: Microchip Tech
    [    4.810104] hub 2-1:1.0: USB hub found
    [    4.813907] hub 2-1:1.0: 3 ports detected
    [    5.041206] usb 1-1.2: new full-speed USB device number 3 using xhci-hcd
    [    5.061055] i2c i2c-0: Added multiplexed i2c bus 6
    [    5.066560] ina2xx_adc 7-0040: error configuring the device
    [    5.072186] i2c i2c-0: Added multiplexed i2c bus 7
    [    5.077129] i2c i2c-0: Added multiplexed i2c bus 8
    [    5.082074] i2c i2c-0: Added multiplexed i2c bus 9
    [    5.086866] pca954x 0-0075: registered 8 multiplexed busses for I2C switch pca9548
    [    5.094477] cdns-i2c ff030000.i2c: 100 kHz mmio ff030000 irq 32
    [    5.101487] cdns-wdt fd4d0000.watchdog: Xilinx Watchdog Timer with timeout 60s
    [    5.108987] cdns-wdt ff150000.watchdog: Xilinx Watchdog Timer with timeout 10s
    [    5.116435] pwrseq_simple sdio_pwrseq: mmc succesfully got gpio_resetn
    [    5.122988] pwrseq_simple sdio_pwrseq: mmc succesfully got gpio_chip_en
    [    5.159957] usb 1-1.2: New USB device found, idVendor=046d, idProduct=c52b, bcdDevice=12.03
    [    5.168306] usb 1-1.2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
    [    5.175616] usb 1-1.2: Product: USB Receiver
    [    5.179879] usb 1-1.2: Manufacturer: Logitech
    [    5.197648] mmc0: SDHCI controller on ff160000.mmc [ff160000.mmc] using ADMA 64-bit
    [    5.206520] sdhci-arasan ff170000.mmc: allocated mmc-pwrseq
    [    5.244318] mmc1: SDHCI controller on ff170000.mmc [ff170000.mmc] using ADMA 64-bit
    [    5.256178] rtc_zynqmp ffa60000.rtc: setting system clock to 1970-01-01T00:00:08 UTC (8)
    [    5.259451] mmc0: new high speed SDXC card at address 0001
    [    5.264272] of_cfs_init
    [    5.264315] of_cfs_init: OK
    [    5.273690] mmcblk0: mmc0:0001 00000 59.6 GiB 
    [    5.275197] cfg80211: Loading compiled-in X.509 certificates for regulatory database
    [    5.288376]  mmcblk0: p1 p2
    [    5.295459] input: Logitech USB Receiver as /devices/platform/amba/ff9e0000.usb1/fe300000.dwc3/xhci-hcd.0.auto/usb1/1-1/1-1.2/1-1.2:1.0/0003:046D:C52B.0001/input/input0
    [    5.311597] mmc1: new high speed SDIO card at address 0001
    [    5.369602] hid-generic 0003:046D:C52B.0001: input: USB HID v1.11 Keyboard [Logitech USB Receiver] on usb-xhci-hcd.0.auto-1.2/input0
    [    5.386043] input: Logitech USB Receiver Mouse as /devices/platform/amba/ff9e0000.usb1/fe300000.dwc3/xhci-hcd.0.auto/usb1/1-1/1-1.2/1-1.2:1.1/0003:046D:C52B.0002/input/input1
    [    5.401849] input: Logitech USB Receiver Consumer Control as /devices/platform/amba/ff9e0000.usb1/fe300000.dwc3/xhci-hcd.0.auto/usb1/1-1/1-1.2/1-1.2:1.1/0003:046D:C52B.0002/input/input2
    [    5.416770] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
    [    5.424891] clk: Not disabling unused clocks
    [    5.429404] ALSA device list:
    [    5.432357]   #0: DisplayPort monitor
    [    5.436573] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
    [    5.445187] cfg80211: failed to load regulatory.db
    [    5.477375] input: Logitech USB Receiver System Control as /devices/platform/amba/ff9e0000.usb1/fe300000.dwc3/xhci-hcd.0.auto/usb1/1-1/1-1.2/1-1.2:1.1/0003:046D:C52B.0002/input/input3
    [    5.493807] hid-generic 0003:046D:C52B.0002: input: USB HID v1.11 Mouse [Logitech USB Receiver] on usb-xhci-hcd.0.auto-1.2/input1
    [    5.508694] hid-generic 0003:046D:C52B.0003: device has no listeners, quitting
    [    5.543680] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
    [    5.551812] VFS: Mounted root (ext4 filesystem) on device 179:2.
    [    5.576144] devtmpfs: mounted
    [    5.579541] Freeing unused kernel memory: 704K
    [    5.584047] Run /sbin/init as init process
    [    5.593217] usb 1-1.4: new high-speed USB device number 4 using xhci-hcd
    [    5.697971] usb 1-1.4: New USB device found, idVendor=0424, idProduct=2740, bcdDevice= 2.00
    [    5.706336] usb 1-1.4: New USB device strings: Mfr=1, Product=2, SerialNumber=0
    [    5.713639] usb 1-1.4: Product: Hub Controller
    [    5.718083] usb 1-1.4: Manufacturer: Microchip Tech
    
    
    INIT: version 2.88 booting
    
    
    Starting udev
    [    6.224514] udevd[362]: starting version 3.2.8
    [    6.242578] random: udevd: uninitialized urandom read (16 bytes read)
    [    6.249678] random: udevd: uninitialized urandom read (16 bytes read)
    [    6.256158] random: udevd: uninitialized urandom read (16 bytes read)
    [    6.314181] udevd[363]: starting eudev-3.2.8
    [    6.420108] zocl: loading out-of-tree module taints kernel.
    [    6.433051] [drm] Probing for xlnx,zocl
    [    6.437277] zocl-drm amba:zyxclmm_drm: IRQ index 32 not found
    [    6.443461] [drm] FPGA programming device pcap founded.
    [    6.448823] [drm] PR Isolation addr 0x0
    [    6.449921] [drm] Initialized zocl 0.0.0 00000 for amba:zyxclmm_drm on minor 1
    [    6.538132] zynqmp_r5_remoteproc zynqmp-rpu: RPU core_conf: split
    [    6.544777] remoteproc remoteproc0: r5@0 is available
    [    7.273839] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null)
    Tue Jan 26 05:51:28 UTC 2021
    
    
    [    9.285992] urandom_read: 4 callbacks suppressed
    [    9.286000] random: dd: uninitialized urandom read (512 bytes read)
    Starting Ultra96 AP setup daemon.
    
    
    Turning Ultra96 WiFi & Bluetooth LEDs ON...done.
    
    
    
    
    
    [    9.350064] Registering wifi device
    [    9.353576] Max scan ids= 10,Max scan IE len= 1000,Signal Type= 1,Interface Modes= 844
    Starting Flask server deamon to serve Ultra96 startup page[    9.361994] Initializing Locks ...
    [    9.370942] wilc_netdev_ifc_init name[wlan0] vnum[1], idx[0], wilc-type[2] nl-type[2]
    [    9.378900] wifi_pm : 0
    [    9.381356] wifi_pm : 1
    [    9.384191] wilc_sdio mmc1:0001:1: Driver Initializing success
    .
    
    
    
    
    INIT: Entering runlevel: 5
    
    
    
    
    Starting system message bus: [    9.605235] random: python3: uninitialized urandom read (24 bytes read)
    [    9.617858] add_virtual_intf name[p2p0] vnum[1], nl-type[2]
    [    9.626126] wilc_netdev_ifc_init name[p2p0] vnum[2], idx[1], wilc-type[2] nl-type[2]
    [    9.631937] random: dbus-daemon: uninitialized urandom read (12 bytes read)
    [    9.643186] WILC POWER UP
    [    9.645888] wilc_sdio mmc1:0001:1: SDIO speed: 50000000
    [    9.651659] wilc_sdio mmc1:0001:1: chipid 003000d0
    [    9.666763] wilc_wlan_firmware_downloadDownloading firmware size = 136788
    dbus.
    
    
    Configuring network interfaces... [    9.890013] wilc_wlan_firmware_download Offset = 119860
    [    9.897576] wilc_wlan_firmware_download Offset = 136788
    [   10.236262] wilc_sdio mmc1:0001:1: wilc_sdio_disable_interrupt
    Successfully initialized wpa_supplicant
    
    
    [   10.458655] power up request for already powered up source Wifi
    [   10.464622] Device already up. request source is Wifi
    [   10.472069] wilc_wlan_firmware_downloadDownloading firmware size = 136788
    [   10.694036] wilc_wlan_firmware_download Offset = 119860
    [   10.701695] wilc_wlan_firmware_download Offset = 136788
    done.
    
    
    Starting random number generator daemon
    
    
    Initializing available sources
    
    
    
    
    
    
    Failed to init entropy source hwrng
    
    
    
    
    
    
    [   13.555380] add_virtual_intf name[mon.p2p0] vnum[2], nl-type[6]
    [   13.561952] add_virtual_intf:monitor name[p2p0] vnum[2], idx[1], wilc-type[1], nl-type[3]
    [   13.624788] start_ap,dev[p2p0]
    [   17.965234] random: crng init done
    Initializing AES buffer
    
    
    
    
    
    
    Enabling JITTER rng support
    
    
    
    
    
    
    Initializing entropy source jitter
    
    
    
    
    
    
    .
    
    
    Starting Connection Manager
    
    
    Starting haveged: haveged: listening socket at 3
    
    
    haveged: haveged starting up
    
    
    
    
    
    
    
    
    
    
    
    
    Starting OpenBSD Secure Shell server: sshd
    
    
    done.
    
    
    Starting Xserver
    
    
    Starting rpcbind daemon...
    
    
    done.
    
    
    starting statd: done
    
    
    
    
    
    
    X.Org X Server 1.20.5
    
    
    X Protocol Version 11, Revision 0
    
    
    Build Operating System: Linux 3.10.0-693.el7.x86_64 x86_64 
    
    
    Current Operating System: Linux u96v2-sbc-base-2020-2 5.4.0-xilinx-v2020.2 #1 SMP Tue Jan 26 05:28:46 UTC 2021 aarch64
    
    
    Kernel command line:  earlycon console=ttyPS0,115200 clk_ignore_unused root=/dev/mmcblk0p2 rw rootwait
    
    
    Build Date: 15 November 2020  10:04:24AM
    
    
    
    
    
    Current version of pixman: 0.38.4
    
    
    Before reporting problems, check http://wiki.x.[   19.830186] [drm] Pid 830 opened device
    org
    
    
    to make sure that you have the latest version.
    
    
    Markers:[   19.835816] [drm] Pid 830 closed device
     (--) probed, (**) from config file, (==) default setting,
    
    
    (++) from command line, (!!) notice, (II) informational,
    
    
    (WW) warning, (EE) error, (NI) not implemented, (??) unknown.
    
    
    (==) Log file: "/var/log/Xorg.0.log", Time: Tue Jan 26 05:51:39 2021
    
    
    Starting bluetooth: (==) Using config file: "/etc/X11/xorg.conf"
    
    
    (==) Using system config directory "/usr/share/X11/xorg.conf.d"
    
    
    bluetoothd.
    
    
    [   20.019089] zynqmp-display fd4a0000.zynqmp-display: DP-1: EDID is invalid:
    [   20.026094] [00] BAD  00 ff ff ff ff ff ff 00 ff ff ff ff ff ff ff ff
    [   20.032614] [00] BAD  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
    [   20.039131] [00] BAD  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
    [   20.045658] [00] BAD  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
    [   20.052188] [00] BAD  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
    [   20.052191] [00] BAD  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
    [   20.052193] [00] BAD  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
    [   20.052198] [00] BAD  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
    Starting internet superserver: inetd.
    
    
    exportfs: can't open /etc/exports for reading
    
    
    NFS daemon support not enabled in kernel
    
    
    Starting ntpd: done
    
    
    Starting syslogd/klogd: done
    
    
    Starting internet superserver: xinetd.
    
    
     * Starting Avahi mDNS/DNS-SD Daemon: avahi-daemon
    
    
     [A [74G[ ok ]
    
    
    Starting Telephony daemon
    
    
    Starting watchdog daemon...done
    
    
    Starting Linux NFC daemon
    
    
    Starting tcf-agent: OK
    The XKEYBOARD keymap compiler (xkbcomp) reports:
    > Warning:          Unsupported high keycode 372 for name <I372> ignored
    >                   X11 cannot support keycodes above 255.
    >                   This warning only shows for the first high keycode.
    Errors from xkbcomp are not fatal to the X server
    D-BUS per-session daemon address is: unix:abstract=/tmp/dbus-2fxxZBG9BF,guid=08f565f96a8560408a3a49a6600faded
    Opening webpage
    
    
    
    
    PetaLinux 2020.2 u96v2-sbc-base-2020-2 ttyPS0
    
    
    u96v2-sbc-base-2020-2 login: matchbox: Cant find a keycode for keysym 269025056
    matchbox: ignoring key shortcut XF86Calendar=!$contacts
    
    
    matchbox: Cant find a keycode for keysym 2809
    matchbox: ignoring key shortcut telephone=!$dates
    
    
    matchbox: Cant find a keycode for keysym 269025050
    matchbox: ignoring key shortcut XF86Start=!matchbox-remote -desktop
    
    
    dbus-daemon[994]: Activating service name='org.a11y.atspi.Registry' requested by ':1.0' (uid=0 pid=987 comm="matchbox-desktop ")
    dbus-daemon[994]: Successfully activated service 'org.a11y.atspi.Registry'
    SpiRegistry daemon is running with well-known name - org.a11y.atspi.Registry
    [settings daemon] Forking. run with -n to prevent fork
    [970:970:0126/055147.391220:ERROR:edid_parser.cc(102)] Too short EDID data: manufacturer id
    [1089:1089:0126/055147.796165:ERROR:gl_surface_egl.cc(489)] eglChooseConfig failed with error EGL_BAD_ATTRIBUTE
    [1089:1089:0126/055147.918795:ERROR:gl_surface_egl.cc(489)] eglChooseConfig failed with error EGL_BAD_ATTRIBUTE
    [1089:1089:0126/055147.919361:ERROR:gl_surface_egl.cc(489)] eglChooseConfig failed with error EGL_BAD_ATTRIBUTE
    [1089:1089:0126/055147.933308:ERROR:sandbox_linux.cc(374)] InitializeSandbox() called with multiple threads in process gpu-process.
    [1089:1089:0126/055148.552184:ERROR:gl_surface_egl.cc(1269)] eglCreateWindowSurface failed with error EGL_BAD_NATIVE_WINDOW
    [970:1144:0126/055148.609613:ERROR:object_proxy.cc(632)] Failed to call method: org.freedesktop.DBus.Properties.Get: object_path= /org/freedesktop/UPower: org.freedesktop.DBus.Error.ServiceUnknown: The name org.freedesktop.UPower was not provided by any .service files
    [970:1144:0126/055148.610699:ERROR:object_proxy.cc(632)] Failed to call method: org.freedesktop.UPower.GetDisplayDevice: object_path= /org/freedesktop/UPower: org.freedesktop.DBus.Error.ServiceUnknown: The name org.freedesktop.UPower was not provided by any .service files
    [970:1144:0126/055148.611996:ERROR:object_proxy.cc(632)] Failed to call method: org.freedesktop.UPower.EnumerateDevices: object_path= /org/freedesktop/UPower: org.freedesktop.DBus.Error.ServiceUnknown: The name org.freedesktop.UPower was not provided by any .service files
    
    
    
    
    u96v2-sbc-base-2020-2 login: 
    
    
    u96v2-sbc-base-2020-2 login: root
    

      • After the first boot, run the zynqmp_dpu_optimize.sh script to optimize the environment and then reboot the board.
        • NOTE: This only needs to be run once.
      162  cd ~/dpu_sw_optimize/zynqmp/
      163  source ./zynqmp_dpu_optimize.sh
    

      • Suppress the dmesg messages
    dmesg -D
    

      • Vertify the Vitis-AI enviroment by running the dexplorer utility
    root@ultra96v2-2020-1:~# dexplorer --whoami
    [DPU IP Spec]
    IP  Timestamp            : 2020-06-18 12:00:00
    DPU Core Count           : 1
    
    
    [DPU Core Configuration List]
    DPU Core                 : #0
    DPU Enabled              : Yes
    DPU Arch                 : B2304
    DPU Target Version       : v1.4.1
    DPU Freqency             : 300 MHz
    Ram Usage                : Low
    DepthwiseConv            : Enabled
    DepthwiseConv+Relu6      : Enabled
    Conv+Leakyrelu           : Enabled
    Conv+Relu6               : Enabled
    Channel Augmentation     : Enabled
    Average Pool             : Enabled
    
      • Note the DPU Arch vaule of B2304.  This will be used to run the examples. B2304

     

      • Export Display
    export DISPLAY=:0.0
    

     

      • Change resolution to 640x480
    root@ultra96v2-2020-1:~# xrandr --output DP-1 --mode 640x480
    root@ultra96v2-2020-1:~# [694:694:1021/010722.878697:ERROR:edid_parser.cc(102)] Too short EDID data: manufacturer id
    [694:694:1021/010722.916614:ERROR:edid_parser.cc(102)] Too short EDID data: manufacturer id
    

     

      • Run adas_detection example
    root@ultra96v2-2020-1:~/Vitis-AI/VART/samples/adas_detection# ./adas_detection ./video/adas.avi ./model_dir_for_B2304_lr/yolov3_adas_pruned_0_9.elf 
    WARNING: Logging before InitGoogleLogging() is written to STDERR
    I1021 01:42:01.846880  1776 main.cc:380] create running for subgraph: yolov3_adas_pruned_0_9
    

     

     

      • Run video_analysis example
    cd ~/Vitis-AI/VART/samples/video_analysis
    ./video_analysis ./video/structure.mp4 ./model_dir_for_B2304_lr/ssd_traffic_pruned_0_9.elf
    Detect video: ./video/structure.mp4
    WARNING: Logging before InitGoogleLogging() is written to STDERR
    I1021 02:17:50.885901  2158 main.cc:641] create running for subgraph: ssd_traffic_pruned_0_9
    

     

     

      • Run segmentation example
    cd ~/Vitis-AI/VART/samples/segmentation
    ./segmentation ./video/traffic.mp4 ./model_dir_for_B2304_lr/fpn.elf
    Detect video: ./video/traffic.mp4
    WARNING: Logging before InitGoogleLogging() is written to STDERR
    I1021 02:30:19.205122  2249 main.cc:264] create running for subgraph: fpn
    

     

     

      • Run resnet50 example
    cd ~/Vitis-AI/VART/samples/resnet50
    root@ultra96v2-2020-1:~/Vitis-AI/VART/samples/resnet50# ./resnet50 ./model_dir_for_B2304_lr/resnet50.elf 
    WARNING: Logging before InitGoogleLogging() is written to STDERR
    I1021 01:44:36.414351  1828 main.cc:288] create running for subgraph: resnet50_0
    
    
    Image : 001.jpg
    top[0] prob = 0.980779  name = brain coral
    top[1] prob = 0.008485  name = coral reef
    top[2] prob = 0.008485  name = jackfruit, jak, jack
    top[3] prob = 0.000542  name = sea urchin
    top[4] prob = 0.000422  name = puffer, pufferfish, blowfish, globefish
    

     

     

    OpenCV Attempt with Ultra96-V2 and 96Boards On Semiconductor Dual Camera Mezzanine

     

    • I did attempt to get OpenCV to work with the Ultra96-V2 and the Dual Camera Mezz board, however I could only get it to verify that an image was received. This was not sent to the display and i am unclear how to accomplish that.
      • The following was used as a reference

                   https://forums.xilinx.com/t5/Embedded-Linux/Create-GStreamer-pipeline-with-Python-snippet/td-p/993091

     

      • Script used on the PetaLinux Build image shown previously

                   gstream-opencv-2.py

    import numpy as np
    import cv2
    
    OUTPUT_W=1920
    OUTPUT_H=180
    
    cap_receive = cv2.VideoCapture('v4l2src device=/dev/video0 io-mode="dmabuf" ! video/x-raw, width=1920, height=1080, format=YUY2, framerate=60/1 ! videoconvert ! appsink plane-id=38 bus-id=fd4a0000.zynqmp-display sync=false', cv2.CAP_GSTREAMER)
    
    #out_send = cv2.VideoWriter('appsrc" ! videoconvert ! xlnxvideosink sink-type="dp"  plane-id=38 bus-id=fd4a0000.zynqmp-display sync=false fullscreen-overlay=true',cv2.CAP_GSTREAMER,0, 60, (1920,1080), True)
    out_send = cv2.VideoWriter('appsrc" ! videoconvert ! xlnxvideosink sink-type="dp"  plane-id=38 sync=false fullscreen-overlay=true',cv2.CAP_GSTREAMER,0, 60, (1920,1080), True)
    
    while True:
        if not cap_receive.isOpened():
            print('VideoCapture not opened')
            exit(0)
    
        ret,frame = cap_receive.read()
    
        if not ret:
            print('empty frame')
            continue
        
        print('received image')
        out_send.write(frame)
        
        if cv2.waitKey(1)&0xFF == ord('q'):
            break
    
    cap_receive.release()
    out_send.release()
    

    • Output
    root@ultra96v2-2020-1:~/develop# python3 gstream-opencv-2.py
    
    received image
    
    received image
    
    received image
    
    received image
    
    received image
    

    Conclusion

    • This has been an interesting RoadTest and one that did not quite end as expected; outside of being a bit late. My initial intent was to use the Ultra96-V2 and the 96Boards On Semiconductor Dual Camera Mezzanine with a Robotics application for Object Identification via Vision, however I was not able to get anything such as OpenCV to take an image from the Dual Camera Mezz and process it to display on a monitor or sent to a movie file. There are some examples for the Ultra96-V2 and Dual Camera Mezz combo such as Out of Box example, build PetaLinux with Dual Camera Mezz support and build the Hardware definition project.  But, again, this only are used to display the camera images to the Display Port output of the Ultra96-V2.  The Vitis-AI examples were interesting, however they do not have support for the Dual Camera Mezz so only run with something like a USB camera connected to the Ultra96-V2. The other item of note, like a previous RoadTest, the available projects are only for the older Xilinx Vitis 2020.1 version of the software tools and not the latest 2020.2.  This did result in having to go through the Virtual Machine creation twice. In all, the Ultra96-V2 and  96Boards On Semiconductor Dual Camera Mezzanine has a lot of potential and would be a nice tool for applications in Robotics and other Vision related applications. Getting PYNQ support would be nice as well. Perhaps with a bit of work this will be possible in the near future.

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