Google finds a few things that are tantalizingly close, but nobody provided a real answer, so here goes with a pretty basic question (see picture below). I want to have four identical subsheets provide four bits each of a 16-bit signal to be passed higher up (MUXOUT[1..16]). I've already messed around with making the sheets REPEAT, but that was even worse. This should be a simple operation, one that I've done many times in OrCAD, for example. In Altium (Circuit Studio, but I think these concepts are identical in AD) I get a "Duplicate Net Names Bus Slice" error on MUXOUT[1..16]. (I changed the names of entries and ports since some comments indicated that having the same net/bus names as a port name could potentially be a problem). Of course I could have four separate ports, making each one only four bits, but that seems really lame. What is the correct way to combine bus slices into a larger bus?
4 groups of 4 each since you said each has 4 bits.