7 Replies Latest reply on Jun 20, 2017 5:55 PM by tarribred61

    Solder Mask rule for vias and pads

    opeongo73

      I would like to have my THole pads with a pull back of 3mils and the vias tented by -1mil. I can't see any way this can be done

      as vias don't come up in the selections. You can It select each via and do it but that's crazy.

       

      Does anyone know how to do this?

        • Re: Solder Mask rule for vias and pads
          songshome

          Hello, just use PCB Filter. Than you can select Vias or Pads. Than you can edit tenting within PCB Inscpector ( F11).

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          • Re: Solder Mask rule for vias and pads
            harvie256

            Sounds like you just need to setup the relevant rules for pads and vias.  To differentiate between through hole and smt pads will probably require a second selection criteria based on hole size (just a thought as I haven't actually tried it.)

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            • Re: Solder Mask rule for vias and pads
              tarribred61

              For anything other than a simple PCB it may be difficult to have much control of SM expansion on vias. In CS this works in a crippled manner as compare to Altium Designer.

               

              It looks to me like the options provided by CS aren't up to professional level control.

               

              There should be three ways I know of, two mentioned above.

              1) You can select them with the filter tool.  First Reset Filter to get rid of any past filters. Then mouse pick View > Filter then choose groups <All> and Objects Via with Layers <All>.  Then only the vias should be chosen.  Use the mouse to drag a highlight box around them or press CTRL-A to pick them all.  Then View > Object Inspector gets you to the PCB Inspector tab. There is a checkbox selection ofr Solder Mask Override but there seems to be no value to set so it isn't clear to me what the check box does.  Tenting check boxes seem to work though.  Some fabricators do not want to tent vias both sides as this can trap chemicals.

              If you have different size vias it may be difficult to sort them this way.  In AD you can use advance filters to get specific ones by size.

               

               

              2) Preferred (if it worked): use rules (as mentioned) to define the mask for specific objects.  Use Home > Design Rules

              Pick Solder Mask Expansion as the rule category.  In my CS the default was 0 for all pads.  I typically prefer a default of 4mil (or 0.102mm) and make this smaller for high density parts (maybe as low as 2mm) or make it negative for solder mask defined pads or to encroach vias.

               

              Look up an Altium tutorial video on how rules work.  The basics are to right click on the rule category and pick New Rule (or left click on New Rule).

              Rename your rule to something (e.g. SMExpand_Vias).  However, I notice that there are limitations to the selection criteria in CS so it doesn't seem possible to match the object to specific hole sizes or as vias only.

              3) Painstakingly, select each via and edit its properties.  As the OP mentioned, this is crazy to do.

               

              Perhaps a fourth way to handle via encroachment might be to tent both sides of the PCB for vias and then add a fabrication note that all tented vias larger than than 10mil (or so) do not need to plugged and those smaller can be encroached to prevent entrapment of chemicals.  With a proper note the fabricators should be able to do it with their tools.

               

              Maybe someone with fabrication knowledge can comment on better wording?

               

              It seems like this is a case where anything sophisticated is a problem in CS.

               

              If you know someone with Altium Designer it might be worth trying to have them export a rule and then try to import it into CS.

                • Re: Solder Mask rule for vias and pads
                  harvie256

                  Here's an example of how to setup a rule that has -1mil clearance for pads with holes, and the default 4mil for SMT.  Save it in a .RUL text file, add more lines or changes those to get what you need then import the rule in the CS design rules dialog (clearing old rules when prompted.)  Things to take note of are the "SCOPE1EXPRESSION" , "NAME" and "EXPANSION" tags

                   

                  SELECTION=FALSE|LAYER=UNKNOWN|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|UNIQUEID=VYXCOIPX|RULEKIND=SolderMaskExpansion|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=HoleDiameter<>0|SCOPE2EXPRESSION=All|NAME=ThroughHole_Mask|ENABLED=TRUE|PRIORITY=1|COMMENT= |DEFINEDBYLOGICALDOCUMENT=FALSE|EXPANSION=-1mil¶

                  SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|UNIQUEID=IBDQWLLY|RULEKIND=SolderMaskExpansion|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=SolderMaskExpansion|ENABLED=TRUE|PRIORITY=2|COMMENT= |DEFINEDBYLOGICALDOCUMENT=FALSE|EXPANSION=4mil¶

                    • Re: Solder Mask rule for vias and pads
                      tarribred61

                      Thanks for that.  It does seem to work so this shows that some of the ability of AD is still there and can be used.

                       

                      It has been a while since I looked at the details of Altium query tags.  For the interested, some information is here An Insiders Guide to the Query Language | Online Documentation for Altium Products

                      Or search for information on Altium query builder to get more.

                       

                      Also, if you get an evaluation copy or a viewer copy of Altium you can play with some of the queries.  Alas, the viewer edition won't let you export rules so you can't use it as a rule builder.

                       

                      Based on your suggested rule I modified it as follows:

                      SELECTION=FALSE|LAYER=UNKNOWN|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|UNIQUEID=VYXCOIPX|RULEKIND=SolderMaskExpansion|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=IsVia AND NOT (IsFabTestpoint OR IsAssyTestpoint)|SCOPE2EXPRESSION=All|NAME=SMExpand_Via|ENABLED=TRUE|PRIORITY=1|COMMENT= |DEFINEDBYLOGICALDOCUMENT=FALSE|EXPANSION=-1mil¶

                      SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|UNIQUEID=IBDQWLLY|RULEKIND=SolderMaskExpansion|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=SolderMaskExpansion|ENABLED=TRUE|PRIORITY=2|COMMENT= |DEFINEDBYLOGICALDOCUMENT=FALSE|EXPANSION=4mil¶

                       

                      Setting the SCOPE1EXPRESSION to IsVia AND NOT (IsFabTestpoint OR IsAssyTestpoint) should encroach the vias slightly by the rule but not if they are used as test points.

                       

                      These rules can be a lot more sophisticated in full AD.  It is a pity they went to the effort to cripple this.  Most CS users won't get to see how great AD actually is.

                       

                      Added:

                      I think the conditional expression for just through hole pads is (IsPad And OnMultiLayer).  So if, for example, you wanted different solder mask expansions for through hole pads versus any pad use that in the SCOPE1EXPRESSION= value as the filter.

                       

                      You would have to try it, but if you want different expansions on top layer versus bottom layer you can probably find a rule expression for that also.