I am designing two project variants. They share the same PCB. The difference between variants is kind of non volatile memory used. One has ordinal NAND in TSSOP package, other has modern eMMC in BGA. There is no variant, where both memories exist. Because of that, I would like to save board space and put both parts in the same place. There are no collisions between pads, top overlay etc. However both parts are marked on PCB in red color and component clearance constraint violation is reported. Is it possible to set up constraint violation rule in such way that it takes variants into account?