I hope this question isn't too hard to answer, but I'm working on a design that involves a 288-ball MPU and a single DDR2 1Gb (64MB x 16) memory chip and other parts. I know to length match the clock, data and address lines, so I did that thanks to Circuit Studio's accordion and length targeting features. Now, I read a place or two that the tracks on each layer need to be length matched as well, in addition to the total length due to signals traveling at slightly different speeds on different layers. Is this correct? If so, does Circuit Studio have tools to accomplish this? I saw a "Net And Layer" option in the Edit PCB Rule dialog. Can this option accomplish this? Any help would be greatly appreciated.
Also, does Circuit Studio have any tools for doing impedance calculations for layer stack-ups? If not, then does anyone know what a good, easy-to-use, cost-effective tool for this? Thanks in advance.