5 Replies Latest reply on Apr 16, 2020 11:45 AM by drozwood90

    IDT Versaclock programmation



      I'm designing my own custom carrier board to support the UltraZed SOM and I planned to use the same IDT clock generator used on your IOCC carrier board.

      The reference indicated in the BOM is 5P49V5935B521LTGI seems to be a custom reference, the "521" indicating the custom configuration. Ordering this special part from IDT is complicated (delay and important MOQ), is it possible to order it in small quantities directly from Avnet?

      If not, is the programming file available in order to have exactly the same configuration starting from a blank IDT device?

      Regards, Christophe

        • Hello Sonictai,

          Hello Sonictai,

          Thank you for stating the part #. In checking the BOM we found an error in the IDT part #. The correct part # is 5P49V5935B536LTGI. We are currently in the process of updating the BOM to reflect the correct part #.

          We suggest that you buy the part. The reason being that the in-circuit programing of the blank is not as trivial as simply getting the programming file. In order to program the device on the board, the IDT device has to be operated at 3.3V (we run this device at 1.8V on our CC, which eliminates the possibility of us performing in-circuit programming of the device on our CC). In addition to this voltage requirement, there are a couple of other requirements on the I2C interface when using an external dongle to program the device.

          Talkinga look on our site, the part is currently out of stock with a 12 week lead time with a minimum quantity of 490 pieces https://www.avnet.com/shop/us/p/rf-and-microwave/rf-ics/pll/integrated-device-technology/5p49v5935b536ltgi-3074457345631975622/ I would suggest you contact your sales rep and request a quote.


            • Re: Hi Christophe

              Apologies for using this old forum post, but there aren't a lot of discussions here regarding the matter I'm looking into.


              I see that the 5P49V5935B536LTGI is used on Avnet's UltraZED Carrier Card to generate GTR reference clocks for the Zynq+ on the UltraZED. I've downloaded the datasheet for this part from IDT.


              Fortunately, the datasheet contains a representative phase noise plot of the device when it's creating a clock that's appropriate for use as a GTR reference--i.e., 100 MHz.


              Unfortunately, this device does not seem to comply with the required phase noise mask of the Zynq+ device, for GTR reference clocks. This mask is called out in Table 61 of the Xilinx document DS925.


              Below is a screen grab of the phase noise graph from the data sheet, and I've drawn the Zynq's phase noise mask on top of it as a red line.


              Can you tell me if and how you've dealt with this discrepancy?


              Kind regards,

              Joe Galibois


              Avnet UltraZED GTR RefClk Generator Phase Noise w/ Xilinx Mask

              Zynq+ GTR RefClk Phase Noise Mask

                • Re: Hi Christophe

                  Hi there,


                  We worked with IDT on this and based on that effort validated the clock as valid for the uses we needed within our system.

                  If you have further concerns, you can contact your local FAE and they have a mechanism to contact IDT and leverage the same Engineering team to assist you with your design.





              • Hello Josh and thank you for

                Hello Josh and thank you for your answer.

                I was planning to buy some 5P49V5935B521LTGI parts so thank for the correction of the reference, I have stopped my command. Taking into account the technical points that you mentioned, some others points that I was already aware, and some purchase "difficulties" from IDT I have decided to take another clock synthesizer solution.

                Regards, Christophe

                  • Hi Christophe

                    Hi Christophe

                    Would you have a moment and the ability to tell me what your alternate solution to the IDT clock reference is?  I know I only need a reference for the USB3.0 Transceiver and Xilinx had a phase noise reference document that the Clock reference has to meet.  I believe Silicon Labs has a possible solution but I was wondering what you or others may have used as an alternative to the IDT solution.


                    Thank you