Based on your other forum post on Lab 9 I will assume that you are attempting to use the 2015.4 version of the Xilinx tools with the 2014.4 version of the Speedway tutorial:
As mentioned in that thread, issues like this can occur in step by step tutorials as the tools change from version to version. You can either use the targeted Xilinx tool version, 2014.4 in this case, or work through the issues that might be introduced by changes in the bsp or driver code.
If any of our forum users have already worked through this issue please post the solution.
I ran into the same problem using Vivado 2016.2, and here's what I did to fix it:
The HW Block Diagram shows the PWM_w_Int_0 module's "Interrupt_out" net connected to the Zynq module's "IRQ_F2P[0:0]" port. From the Xilinx documentation I note that IRQ_F2P is Interrupt ID 61, which is #define'd in xparameters_ps.h as "XPS_FPGA0_INT_ID". So I added a #include "xparameters_ps.h" to the top of my LED_Dimmer_Int.c file, and changed the #define INTC_PWM_INTERRUPT_ID to set it to XPS_FPGA0_INT_ID.
Of course you could alternately short-circuit the extra #include by simply directly setting XPS_FPGA_INT_ID to 61.
If there's a more "official" way to pass interrupt assignments via the hardware definition I'd love to know!
We are actually in process of updating those labs to 2016.2. I recently ran into the same issue as you did with the interrupt_out. The issue stems back all the way to zynq hardware lab 7 when you are packaging your custom IP. In the IP packager under Ports and Interfaces, you will see your interrupt_out port. If you look at the properites on it you will notice that it is labeled as undefined. Right click on it and go Auto Infer Single Bit Interface --> Interrupt. That should fix the problem witht he parameter not passing properly into SDK.