1 Reply Latest reply on May 26, 2016 9:52 PM by mbrown

    PicoZed SDR Pin connections

    charleswolf

      In Vivado I'm trying to assign ports of my block design to the package pins and I've run into an issue for the connections between the XC7Z035 and AD9361.   An example is the schematic net named "IO_L23_35_SPI_CLK"  on page 7 of the picozed schematic http://zedboard.org/sites/default/files/documentations/PicoZedSDR_z7035-ad9361_RevC_schem_02_038702c.pdf It is connecting to pin B11 of the XC7z035.  In vivado when I try to assign the spi clock to pin B11, its not an option because it shows B11 is a ground pin. 

      I'm using Vivado 2014.4.1.  I couldn't find a board definition file for the PicoZed SDR so I selected the part "xc7z035ifbg676-2L" from the list of parts rather than slecting a board.  It feels like I don't have the correct part selected.  Can someone confirm the selection or provide the correct board definition file?

        • Yes, the Zynq device is the
          mbrown

          Yes, the Zynq device is the XC7Z035-L2FBG676I.  It's suspicious that pin B11 shows up as a GND pin in Vivado.  Are you seeing similar problems connecting other signals between the AD9361 and the XC7Z035?

           

          The reference design source files are on Github.  If you download (or clone) the 2015_R2 repository, you can rebuild the Vivado project using their TCL scripts.  Instructions for doing so are on their wiki.

           

          https://wiki.analog.com/resources/fpga/docs/hdl

           

          We haven't created a board def file yet, but I'll put it on the list to create in the next week or 2.

           

          /Matt