4 Replies Latest reply on Jan 17, 2019 4:04 PM by 100darin

    fmchc_python reference design not available on github

    jyingling@mobexp.com

      Hello, the link provided in this example:
      https://github.com/Avnet/hdl
      No longer has the project fmchc_python. Can someone point me to Vivado source projects? I need an implementable design in vivado so that I can modify it as needed. All this zip file has is the boot image. Please help me locate the source code for this project as I cannot find it on github as described in the tutorial. Thanks.

        • Hi,
          jafoste4

          Hi,

          Using the link you provided above, navigate to Projects ->fmchc_python1300c and you will find your desired project. Is this what you were asking about?

          -Josh

            • Thanks, for the pointer, Josh
              jyingling@mobexp.com

              Thanks, for the pointer, Josh. That does seem to be the project that the tutorial describes (although the tutorial does not describe how to access it properly like you just did), however, there is no Vivado project. Only a constraint file and software/scripts. Where can I get the Vivado project file so that I can see and modify the block diagram? Thanks again.

            • Hello, 
              jafoste4

              Hello, 

              you need to source the Script file for this project located here https://github.com/Avnet/hdl/tree/master/Scripts

              When you source this project it will build the entire vivado project for you.

              -Josh

                • Re: Hello, 
                  100darin

                  I think I have a related problem.

                  I cloned the repo, sourced the scripts for the desired project (fmchc_python1300c), fixed a couple folders it couldn't find, and when I opened the Vivado project, I only get a blank block diagram.

                   

                  I recall doing this about a year ago, and it worked fine (even with not having a license for the video stuff yet).

                   

                  I'm using 2018.3, and the output I get from the TCL script is below...

                   

                   

                  source make_fmchc_python1300c.tcl

                  # set argv [list board=PZ7030_FMC2 project=fmchc_python1300c sdk=yes version_override=yes]

                  # set argc [llength $argv]

                  # source ./make.tcl -notrace

                   

                  *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*

                  *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*

                  *-                                                    -*

                  *-        Welcome to the Avnet Project Builder        -*

                  *-                                                    -*

                  *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*

                  *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*

                   

                  +------------------+------------------------------------+

                  | Setting          |    Configuration                  |

                  +------------------+------------------------------------+

                  | Board            |    PZ7030_FMC2                    |

                  +------------------+------------------------------------+

                  | Project          |    fmchc_python1300c              |

                  +------------------+------------------------------------+

                  | SDK              |    yes                            |

                  +------------------+------------------------------------+

                  | Version override |    yes                            |

                  +------------------+------------------------------------+

                   

                  Overriding Version Check, Please Check the Design for Validity!

                   

                  *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*

                  Selected Board and Project as:

                  PZ7030_FMC2 and fmchc_python1300c

                  *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*

                   

                   

                  Not Requesting Tag

                  Setting Up Project fmchc_python1300c...

                  ***** Generating IP...

                  ***** Creating Vivado Project...

                  ***** Updating Vivado to include IP Folder

                  INFO: [IP_Flow 19-234] Refreshing IP repositories

                  INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/hdl-master/IP'.

                  INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2018.3/data/ip'.

                  ***** Creating Block Design...

                  Wrote  : <C:\hdl-master\Projects\fmchc_python1300c\PZ7030_FMC2\fmchc_python1300c.srcs\sources_1\bd\fmchc_python1300c\fmchc_python1300c.bd>

                  CRITICAL WARNING: [PSU-1]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0 has negative value -0.036 . PS DDR interfaces might fail when entering negative DQS skew values.

                  CRITICAL WARNING: [PSU-2]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1 has negative value -0.036 . PS DDR interfaces might fail when entering negative DQS skew values.

                  WARNING: [BD 41-1684] Pin /processing_system7_0/M_AXI_GP0_ACLK is now disabled. All connections to this pin have been removed.

                  ***** General Configuration for Design...

                  ***** Enable XPM_FIFO primitives...

                  ***** Check for Video IP core licenses...

                  WARNING: [IP_Flow 19-2162] IP 'fmchc_python1300c_v_cfa_0_0' is locked:

                  * IP 'fmchc_python1300c_v_cfa_0_0' requires one or more mandatory licenses but no valid licenses were found. However license checkpoints may prevent use of this IP in some tool flows.

                  Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command 'report_ip_status' for more information.

                   

                  +------------------+------------------------------------+

                  | Video IP Core    | License Status                    |

                  +------------------+------------------------------------+

                  | v_cfa            | INVALID                            |

                  +------------------+------------------------------------+

                  | v_cresample      | INVALID                            |

                  +------------------+------------------------------------+

                  | v_osd            | INVALID                            |

                  +------------------+------------------------------------+

                  | v_rgb2ycrcb      | VALID (Full License)              |

                  +------------------+------------------------------------+

                  | v_tc            | VALID (Full License)              |

                  +------------------+------------------------------------+

                   

                  *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*

                  *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*

                  *-                                                    -*

                  *-  !! Detected missing license for video ip cores !!  -*

                  *-                                                    -*

                  *-  For more details, refer to IP status report:  !!  -*

                  *-    video_ip_core_status_report.log                -*

                  *-                                                    -*

                  *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*

                  *-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*

                  !! Detected missing license for video ip cores !!