29 Replies Latest reply on Sep 5, 2019 2:37 AM by shabaz

    More bugs

    Sparkylabs

      1) If I go to edit my board shape I get put into some undefined mode where I cannot edit it or get out of it. The back button will undo things I have done whilst keeping me in a greyed out - out of control mode. The only way out is to close without saving and loose any changes not saved before entering the attempt to change board outline mode. I am also still confused as to why the outline needs defining twice! because unless I put a line around the board shape the autorouter gets confused and so does the PCB manufacturer! The board shape should define the outline in the Gerber. I can send an example project in.

       

      2) Via's: I want to place a series of via's on my board. This board has several layers of different nets. I want my via's to be GND nets. I am constantly asked if I want to repour my plane, if I say yes this means that the plane has to be regenerated for every via I place and will take forever. if I say make unpoured then the via defaults to another net regardless of my setting. I guess I will have unpour all of my polygons and hope for the best! but really this all needs sorting out to make it easier. We have been through this before and demonstrated that things do not behave logically.

        • Re: More bugs
          Sparkylabs

          Update 2) when I place a via with no poured planes I choose one net but this keeps changing. I have to manually edit dozens of vias!!!!! what a hopeless bunch of idiots that wrote this program. It won't even follow SPECIFIC user input. !!!

          • Re: More bugs
            Sparkylabs

            3) dragging tabs around does not even work although appears to be supposed to be possible

            1 of 1 people found this helpful
              • Re: More bugs

                1) It is normal to need three board outlines for a design

                1. Board definition (as seen in 3D view)
                2. Gerber board outline on the Outline layer
                3. Copy of board outline on the global Keepout Layer

                In general it can be easier to use the option to define board outline (3D view) by selecting an existing set of primitives (e.g. the gerber outline) and using the option to define from primitives.

                 

                2) If your polygons are unpoured (typically the easiest way to work on a board) you can place several vias with a given net. Start the via command, hit TAB and define the net and then place on to the board. All the vias should keep the same net until you are done. Don't try to copy and paste vias as this does revert the net to unconnected.

                  • Re: More bugs
                    Sparkylabs

                    OK I will have a go with the board outline from the board edge line. I don't understand, a board edge is the same in the gerber, in the 3D model and as a default keep out area or better put a keep in area not that CS abides by it. This is a joke! what sane person does not have these three elements the same?

                     

                    2) DOES NOT WORK, THE VIA CHANGES OF IT'S OWN ACCORD BECAUSE CIRCUIT STUDIO IS BUGGY!!!! the only way out is to place via's not on the board and then move them which is a silly work around for buggy software!

                • Re: More bugs
                  Sparkylabs

                  A further bug. If I have a polygon pour in a solder paste layer assigned to a net it also covers other nets in what will be a massive short circuit!

                    • Re: More bugs
                      voltsandjolts

                      nonsense input = nonsense output

                        • Re: More bugs
                          Sparkylabs

                          You mean the options I am being given are a nonsense? If a net can be assigned it follows that only that net will be covered.

                            • Re: More bugs
                              voltsandjolts

                              It appears that CS design rules are not applied to polygons on non-copper layers, they are not even assigned to a polygon class when on a non-copper layer. So, no, they won't work on the solder paste layer.

                               

                              However, it's very unusual to have large areas of solder paste that might be generated with polygons on the paste layer. If you are fixing a large (perhaps mechanical) component to the PCB by using a large area of solder paste there is a risk of shorting nearby nets due to the volume of solder which can be squeezed out during component placement. Normally you would use a sparse pattern of small paste squares to fix on larger areas.

                               

                              Paste mask is a whole science with some detail covered in IPC-7525 but this has a good introduction:

                              http://www.jps-pcb.com/upfile/2017/02/20170216155446_850.pdf

                              Page 27 illustrates my point but it's worth skim reading from page 10.

                               

                              If you say this is a bug in CS, I would say the bug is allowing polygons on the paste layers.

                        • Re: More bugs

                          If I have a polygon pour in a solder paste layer assigned to a net it also covers other nets in what will be a massive short circuit!

                          Plex Lucky Patcher Kodi

                            • Re: More bugs

                              As already discussed polygons on non-electrical layers do not operate as normal polygons - they don't clear other objects. Ideally CS should prevent the drawing of polygons on these non-electrical layers to prevent confusion. Why are you trying to assign a net to an object on the solder paste layer?

                                • Re: More bugs
                                  Sparkylabs

                                  I'm trying to "uncover" the entire polygon so that it gets a coating of solder paste. The easiest way to do this is duplicate that layer and tell CS that it belongs to that net assuming that doing so would mean that it would follow the same rules and go around any obstacles in the same way the original polygon did. It's not a problem in this design as there is very little to miss but I would have assumed it would follow the same rules.

                                   

                                  why should I not be able to draw a polygon on a non electrical layer? what is the point of non electrical layer if I can't do stuff on it. I am sorry but as usual we are choosing the lesser of what could be an issue in order to dismiss it. If i want a specific area of copper not covered in solder mask how else do I do it?

                              • Re: More bugs
                                Sparkylabs

                                A further bug, the search function is broke and always has been buggy. I am looking at a schematic, I was to search for C3, but instead of finding C3 on the schematic it finds C3 on a PCB that is not even the projects PCB but another project I have open. Still waiting for that roadmap and lots of bug fixes or is CS dead now?

                                  • Re: More bugs

                                    The search works on the project schematics (open or closed) and any open project PCB. You will need to compile the design after opening to get the schematic search working (Home | Project > Compile).

                                      • Re: More bugs
                                        Sparkylabs

                                        Peter, And therein lies the bug. Firstly i very much hope it does not search closed projects, what use is that (oh of course what you call a feature is a BUG). The problem is that there is a finite length to the list and it soon fills with irrelevant results and the one you want does not even make it to the list. Even with one project open if you look for "C1" you will get BOTH schematic AND PCB results for, C1, C11, C12, C13, C14, C15, C16, C17, C18, C19, invariably it goes in reverse order and you don't even get C1, with multiple projects open it is more that useless as you don't know which C3 is being looked for in which project. So the search function is useless and bug ridden!!!!!!!!!!!!!!! when will it be fixed? when will we get the update we have been promised for years now , forget the last edition of pritification, that was not an update. I my question stands: when will we get the update to fix these bugs? Wen???

                                    • Re: More bugs
                                      Sparkylabs

                                      Here's a tip for free. I have discovered the cause of the lockup when entering the board edge shape edit: If i have any selection filters enabled this disables the editing of the board edge as all items are disabled by the filter. Another small issue with the filter selections is that if i have filters selected and I deselect them all one by one the filters does not return to the all selectable state but a nothing selectable state, the all filter has to be actually clicked on. School boy error to make idiot error to let through testing but then the quality of Altium software is well known to be rubbish by now, about as rubbish as their ability to keep promises. So your fake. update just added more bugs!

                                        • Re: More bugs

                                          You are quite correct about the filters and board shape editing. I have submitted a bug report last month (Jan) to Altium on this issue as it was raised by another customer. Have not yet got around to writing up a knowledge base article yet but should appear by end of Feb.

                                        • Re: More bugs
                                          Sparkylabs

                                          Right, another one! project/outputs/ the schematic print is totally useless! if I select A4 paper I get a quarter size schematic despite the schematic and paper being set to A4. If I try to use scaling I end up with masses of margin and chopped up schematics. I can't see any reasonable way of making what should be a basic thing work.

                                          • Re: More bugs
                                            dexter23

                                            Another bug (in CS v1.5.2), this time in the generated output files

                                             

                                            Today it happened again, so it's not a fluke.

                                             

                                            Gerber solder mask and solder paste output files can be incomplete.

                                             

                                            I know i know is should double check my outputs files, but sometimes i overlook something.

                                            Today (for the second time) i got e comment from my PCB assembly house that there was a problem with placing an SMT part, as there was no cutout(s) in the soldermask and also no hole(s) is the paste screen.

                                             

                                            First i checked the gerber files i sent to the assembly house, and they were right, for 1 (unique) part there were no holes in the solder and past files for this part.

                                            Then i check my design, same error

                                            Then i checked my libary, no problem there, the solder and paste screen where there and drawn correctly

                                             

                                            Reloading the footprint in the design fixed the problem, but....

                                            At no point in time was an 'incomplete' footprint loaded into my design, either it did not exist yet or it was complete.

                                             

                                            The problem occurred (to me) the first time after a 'respin' of a prototype (red board), some small changes needed to be made for the production series (blue board), but not on the 'problem' part.

                                            How do i know this, the (red) proto boards have all the layers correct, the updated version (blue board) is 'suddenly' missing solder mask and solder paste information for 1 footprint.

                                             

                                            Images below:

                                            1) Problem photo sent by assembly house about PCB version 1.1

                                            2) My reply that the Proto (V1.0) did not have this problem

                                            3) Found fault in current design files (screen capture)

                                            4) Screencapture form footprint in library

                                            5) Screen capture of design files after reloading footprint

                                             

                                            PCB V1.1 WITH missing cutouts for L2PCB V1.0 with CORRECT cutouts for L2Screenshot from the V1.1 design filesFootprint in libraryScreenshot from design files after reload of footprint

                                             

                                            This second time i got this picture, and again the complete version is in the library:

                                            VR1 with missing cutouts in soldermask and postescreen (missing tab)SOT-89 from library

                                            I've used this footprint also in other designs before this one, without any problems.

                                             

                                             

                                            Can anybody confirm this problem, and can the guys at CS please fix this.

                                             

                                            With kind regards,

                                             

                                            Dexter23

                                              • Re: More bugs
                                                Sparkylabs

                                                Just admit defeat, let the money go (£1000 in my case) and move to KiCad, sure it's not perfect but unlike the scam that is CS they actually issue updates. Since i started using it a few months ago 2 updates have come out! the same cannot be said for CS in 2 years!!!!!!!!!!!!!!!!!! and the CS updates are no more than what kiCad put out.

                                                 

                                                All CS is, is for Farnell to be able to have thuir own PCB tool like every other man and his dog and for Altiem to get the contact details of a sucker to sell AD to. i have spent £1000 on an advert for Altium designer and a poor advert at that!

                                                • Re: More bugs
                                                  shabaz

                                                  Hi Ted,

                                                   

                                                  I don't own CS, so only looking at this as a 'spot the difference' challenge just out of interest.. could it be due to silkscreen do you think?

                                                  (Agree that shouldn't cause the solder stop mask to disappear, since the mask apertures should take priority I feel). I can't recall what other Altium legacy products did, not used them in years.

                                                  The reason I suggest silkscreen, is because it looks like between the red and blue boards, you've got silkscreen text 'U2' trampling on the pad, for the one that failed (blue board), whereas the red board doesn't have that silkscreen text over the pad.

                                                  Similarly, for your last image, there's some dark-grey stuff that may be a silkscreen? (I can't tell, as mentioned, I don't use CS, and don't know if dark-grey represents silkscreen in the CAD system).