What do your constraints look like? Where are you routing this through the PL? Is your setup the same as in the video you shared? You can safely ignore the no debug cores information.
My two GPIO pins are broken... All software things are good. Thanks for your help Josh!
I'm using Ultra96 with Ultrascale+ core. I followed this video (https://www.youtube.com/watch?v=NzWcRGjhfF8) to implement an example of using the PL part to access GPIO pin. But the codes on my device is not working. I used the oscillocope to check the voltage of the GPIO pin and the voltage is 0V. Below are the pictures of my system.
I'm using Vivado 2018.2.1. I connected my Ultra96 to my PC through JTAG. Then I used the "Program Device" button under hardware manager to program my Ultra96 after the bit stream generating. When I clicked "Program Device" button the picture below shows "there are nod debug cores". Is this meaning I can't use this way to program my device? Could anyone help me to check what is going wrong? Thanks!