0 Replies Latest reply on Jun 10, 2019 6:48 AM by ponnanna

    ZedBoard DDR access


      Hello Everyone!


      I am a newbie in FPGA design.

      I have below 2 questions.

      Q1) Is there a way to get to know how much of the DDR memory is taken by the .elf file developed using SDK? Any ndications in SDK? I just got to know that the User application(.elf) is stored in DDR.


      Q2) Is there a restriction on DDR access? Like Page access etc?. Because I was not able to write 784Kbytes of data starting from location 0x00888C00. I am using Xil_Out32 API. While I was able to successfully store these 784Kbytes of data from location 0x0177CE00.


      Somebody can help me out?


      Thank You


      Best Regards