2 Replies Latest reply on Aug 6, 2019 4:25 PM by dlmcc

    Why is HD I/O so slow?

    dlmcc

      I'm testing an Ultrazed-3EG design with the Avnet IO Carrier Card and finding that the HD IO (LVCMOS33) is extremely slow.  I can't get a rail-to-rail swing on these pins (brought out to the carrier card Arduino connector) unless I am toggling at ~10 MHz or slower.  I am using DRIVE 16, SLEW FAST pin attributes.  Is this expected behavior?  And if so, why?

       

      I'm testing lines that supposedly go directly to the Arduino header pins here - *not* the ones going through carrier card level translation.

        • Re: Why is HD I/O so slow?
          drozwood90

          Hi there,

           

          What do you have plugged into the Arduino connector?

          You can also check your XDC output from Vivado, as it is possible that while you have defined things in one place, it is being overridden in another.  XDC utilizes the LAST given configuration for a constraint.

           

          Which pins are you toggling?  We can check the schematic to ensure that you are in fact using the pins you think you are.

           

          As for measuring, what are you using to measure?  Do you have enough bandwidth?  Is the probe rated for the frequency you are attempting to measure?  Keep in mind that probes typically have an anti-aliasing filter in them, which normally is a low pass.  This would also affect things.

           

          --Dan

          1 of 1 people found this helpful
            • Re: Why is HD I/O so slow?
              dlmcc

              What do you have plugged into the Arduino connector?

              A: Only a scope probe - 350 MHz bandwidth.

               

              As for measuring, what are you using to measure?

              A: For example, measuring a 10 MHz square wave - seeing signal rise and fall times of ~40 ns from package pin G10 (JX2_HD_SE_11_P) at CON3 pin 6.

               

              Which pins are you toggling?

              A: various pins on the con1, con2 and con3 connectors - all with the same slow behavior.  I am seeing the expected activity on the pins, so I believe I have the correct pin assignments.  The signals just act as if they are very heavily capacitively loaded -- very slow rise and fall times, no undershoot or overshoot.

               

              You can also check your XDC output from Vivado, as it is possible that while you have defined things in one place, it is being overridden in another?

              A:The I/O Ports report from Vivado Implementation shows the expected I/O std, drive strength and slew rates.