8 Replies Latest reply on Sep 6, 2019 10:37 AM by fasih.ahmed

    Error in building mult example using Avnet UltraZed-EG Starter Kit (SOM and Carrier Card)

    fasih.ahmed

      Dear All,

       

      I am facing problem in running simple Mult example in SDx. I have also try to change the folder name of the BDF but does not work as mention in this link Ultra96 SDSoC 2018.2 Platform Install | Zedboard

      Please, if you have any solution to this problem then let me know.

      I am using Xilinx Sdx 2018.2 with

       

       

       

      ===>The following messages were generated while creating FPGA bitstream. Log file:/home/ahmed/Xilinx2018.2/SDx/2018.2/workspace-2018.2/MM-test/Debug/_sds/p0/vivado/vivado.log :

      ERROR: [VPL 49-71] The board_part definition was not found for em.avnet.com:ultrazed_eg_pciecc_production:part0:1.1. The project's board_part property was not set, but the project's part property was set to xczu3eg-sfva625-1-i. Valid board_part values can be retrieved with the 'get_board_parts' Tcl command. Check if board.repoPaths parameter is set and the board_part is installed from the tcl app store.

      ERROR: [VPL 60-773] In '/home/ahmed/Xilinx2018.2/SDx/2018.2/workspace-2018.2/MM-test/Debug/_sds/p0/vivado/vivado.log', caught Tcl error:  ERROR: [Board 49-71] The board_part definition was not found for em.avnet.com:ultrazed_eg_pciecc_production:part0:1.1. The project's board_part property was not set, but the project's part property was set to xczu3eg-sfva625-1-i. Valid board_part values can be retrieved with the 'get_board_parts' Tcl command. Check if board.repoPaths parameter is set and the board_part is installed from the tcl app store.

      ERROR: [VPL 60-704] Integration error, problem rebuilding project prj

      ERROR: [VPL 60-806] Failed to finish platform linker

      ERROR: [SdsCompiler 83-5019] Exiting sds++ : Error when calling '/home/ahmed/Xilinx2018.2/SDx/2018.2/bin/vpl   --iprepo /home/ahmed/Xilinx2018.2/SDx/2018.2/workspace-2018.2/MM-test/Debug/_sds/iprepo/repo  --iprepo /home/ahmed/Xilinx2018.2/SDx/2018.2/data/ip/xilinx  --platform /home/ahmed/Xilinx2018.2/SDx/2018.2/platforms/uzegpcie_avnet/uzegpcie_avnet.xpfm  --temp_dir /home/ahmed/Xilinx2018.2/SDx/2018.2/workspace-2018.2/MM-test/Debug/_sds/p0  --output_dir /home/ahmed/Xilinx2018.2/SDx/2018.2/workspace-2018.2/MM-test/Debug/_sds/p0/vpl  --input_file /home/ahmed/Xilinx2018.2/SDx/2018.2/workspace-2018.2/MM-test/Debug/_sds/p0/.xsd/top.bd.tcl  --target hw   --save_temps  --kernels mmult_accel:adapter --webtalk_flag SDSoC  --remote_ip_cache /home/ahmed/Xilinx2018.2/SDx/2018.2/workspace-2018.2/ip_cache --xp "param:compiler.deleteDefaultReportConfigs=false" '

      sds++ log file saved as /home/ahmed/Xilinx2018.2/SDx/2018.2/workspace-2018.2/MM-test/Debug/_sds/reports/sds.log

      ERROR: [SdsCompiler 83-5004] Build failed

       

      Thanks,

      Ahmed