Hi, I am using the UltraZed-EG PCIe Carrier Card as an PCIe Endpoint. I am using the on-board PS PCIe support connected to PS Transcievers (GTR) (UltraZed | Zedboard)
I downloaded the example code from Xilinx (https://www.xilinx.com/support/answers/72076.html ) and build the code.
When I tested, the code always stuck. When I use GDB to debug it, it generates a coredump.
Has anyone use the PS-PCI as PCIe endpoint before? Is any example or reference design I can follow?
Thanks a lot.
We do not support Xilinx reference designs. Have you tried asking for assistance with this design over at the Xilinx forums?