Hello everyone, recently I obtained a Zedboard and I downloaded this document from Xilinx: Zynq-7000 SoC: Embedded Design Tutorial from this link: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug1165-zynq-embedded-design-tutorial.pdf
I have been able to do the first two exercises for the chapters one and two, but I couldn't do the exercise for the chapter 3 (page 34). I have followed the instructions but, when I went to launch the bitstream and it is finished, I had two errors related to DRC. The guide is for the ZC702 board, but I adapted the constrains for the Zedboard.
Anyone who can help me please. Thank you very much.