I'd have to confirm with the SW group, but as far as I know, the networking "stuff" is all initialized and re-initialized between those two steps. This means hardware, clocks, and other control loops.
That is probably the issue you are seeing. I'll pass this along to see if I can get some kind of confirmation.
You may want to take a look at Xilinx XAPP1026 - lwIP Application Examples and XAPP1306 - PS and PL-Based Ethernet Performance with lwIP Stack. I believe the prescribed method is to use the psu_init.tcl to init the Zynq PS when launching the lwIP app, etc. via the Xilinx SDK, and use the FSBL when booting the lwIP apps via SD card.
what you suggest is exactly what I am doing; I am using the lwIP TCP server demo application (no custom code) and it simply does not work when I use the FSBL either from the debugger or booting from the SD card
I have a Vivado design based on UltraZed-EV SOM. I am using Vitis 2019.2 to develop an application that makes use of a lwip TCP server. It happens that if I launch the application by selecting the psu_init.tcl file option in the Target Setup Configuration of the debugger everything works fine. If I select the initialization through the FSBL file, the lwip autonegotiation procedure always fails with the following messages:
Auto negotiation error
Phy setup error
Phy setup failure init_emacps
Ethernet link down
Needless to say that in the final application I need to use the FSBL
Any help is very much appreciated