0 Replies Latest reply on Jul 30, 2020 12:22 PM by kah5236

    Vivado chipscope and  its configured JTAG frequency/probe specification


      I’m using the Ultra96V2 card with the little JTAG board from Avnet.  Is there a magic frequency for configuring the JTAG frequency with Vivado to get the chipscope/internal logic analyzer(ILA) to work?   I’m using Vivado  2019.2 and just using a clock generated from the PS side of the device into the FPGA logic. The debug wizard chose the clock (only one really to use) to drive the ILA block . The FPGA logic is working as expected after programming so I know the clock is there.    I’ve used frequencies for JTAG  at the low and high extremes and in both cases the FPGA programs just fine,  but probing with the internal logic analyzer does not.    At the high end I can’t get it to trigger, at the low end I can a trigger but the waveforms are just not looking right for looking at a simple counter for example.



      Need to amend the question. I think the lower Frequencies make things trigger  correctly but the reason the waveforms didn’t look right at the lower frequency  is because the signals are not what I specified.

      I expected to see a typical count sequence looking at multiple bits but all the bits/waveforms on the screen are the same, it looks like only bit 0.


      I have a simple counter with multiple bits.  In the probe window there is a list of signals with the proper bit notation (e.g.: design_1_i/blinky2_0/inst/slow_clk_reg_n_0_[1:1], design_1_i/blinky2_0/inst/slow_clk_reg_n_0_[2:2 ], etc).

      However, every time I choose a bit to probe  I now notice in the Tcl window the exact same command is issued regardless to what bit is chosen.  The command is:

      add_wave -into {hw_ila_data_1.wcfg} -radix hex { {design_1_i/blinky2_0/inst/slow_clk_reg_n_0_} }


      If I click on : design_1_i/blinky2_0/inst/slow_clk_reg_n_0_[1:1] the above command is executed in Tcl window. (the [1:1] is left off.. defaulting to the 0 bit)

      If I click on : design_1_i/blinky2_0/inst/slow_clk_reg_n_0_[2:2] the exact same  command is executed in Tcl window. (same thing the [2:2] is left off.. defaulting to the 0 bit)


      I can copy and paste the Tcl command and add [0:0] to above string and the command works in a similar manner…but if I type in [1:1] or [2:2] , etc…an error message says it can’t find it. 

      The schematic with the ILA block looks right, the pull down menu with the signals looks right but adding the probes is wrong.


      Does anyone knows what gives?