Thank you for this post. I will get this over to the design team and take appropriate actions.
Thank you for bringing this to our attention. The documents have been revised and posted.
My team found an error (unfortunately the hard way) in the documentaion for the UltraZed-EV regarding the banks that power certain HD_SE_ pins.
- table 19, pg 41 of the CC designer's guide: http://ultrazed.org/sites/default/files/documentations/UltraZed-EV-CC-Designers-Guide-rev-1.1.pdf
- table 29, pg 37 of the SOM hardware guide: http://ultrazed.org/sites/default/files/documentations/UG-AES-ZU7EV-SOM-G-V1.pdf
The error is that both tables say pins HD_SE_[00:11]_P/N go to bank 47 and HD_SE_[12:23]_P/N go to bank 48, which is wrong.
They are swapped: bank 48 drives pins HD_SE_[0:11]_P/N and bank 47 drives pins HD_SE_[12:23]_P/N
We found this out because we powered bank 47 with 1.8 V (using a custom carrier card) and found that several pins we constrained in Vivado 2019.2 to HD_SE_[00:11]_P/N were still powered at 3.3 V.
There may be other tables floating around that show the incorrect banks for the HD_SE_* pins, but I'm not sure.
Please fix for future designers.