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So on the UltraZed SOMs there is no structured power down sequence. All rails turn off simultaneously if there is a loss of input power. The natural decay of each rail when powered off at the same time keeps the delta voltage between rails low enough that you do not risk damage. Power down sequencing is important if parts of the system stay powered when shutting down the SOM (so in a carrier design if the bank voltages stay up).
I will say that all of the supplies on the SOM are tied to the PMBus. We do not have any examples of this working, but it would be possible to shut down supplies one by one through PMBus commands. Unfortunately like I said we don't really have any guidance on how you would do that, but the physical capability is there.
To answer your specific question, all the PGOODs are tied together to the POR signal. Once any supply drops the part is immediately put into power on reset. This protects the configuration and again the delta voltage between rails is never high enough to cause damage when power is removed from the SOM. For your power down purposes, either simultaneously shut down the SOM power and any other power feeding devices that communicate with it, or shut down the carrier fed supplies first then cut power to the SOM.
I think your response answers our questions. I think that we will sequence the carrier board rails down and then remove power to the SOM. Thanks for your quick response.
No problem Jack. Please don't hesitate to reach out again if you have any questions.
We are doing our own custom carrier board design for the Ultrazed-EV SOM with ZU7. For the power supply rails, we are doing our own unique design using a pair of quad buck converters and we can control the sequence on. The designer’s guide talks about the power up sequence, but it really doesn’t explain how the power down sequence is supposed to work. For example, if there is a loss of power, how does the power system detect that the input power has been lost, does it execute a power down sequence in reverse order in that scenario, and does the signal SOM_PG_OUT go low during the power down sequence or not?
Also, if we want to implement a software-controlled shutdown, which is what we would normally do when we want to shut the system down, what is the best way to trigger the power down sequence? I couldn’t find any information about this in the designer’s guide and couldn’t determine how that works from the schematic. Currently, I use the SOM_PG_OUT for the enable to sequence on, but I’m not sure if it would go low at any point to trigger the power down sequence. I believe we can add a power loss detection circuit if needed and rely on bulk capacitance to keep the system running long enough to complete the power down sequence. Do we then just sequence our PMIC's on the carrier board down in the proper order and then allow the main power to the SOM to decay and let the SOM take care of itself?
Do we need to ensure that the system can't turn back on before the power down cycle is complete?